This　paper　presents　a　single　bit　continuous　time　delta-sigma　modulator　(CTDSM)　with　finite　impulse　response　(FIR)　feedback　DAC　designed　for　audio　applications.　By　using　FIR　feedback　in　the　input　stage,　the　linearity　requirements　of　the　first　integrator　are　relaxed,　and　the　clock　jitter　sensitivity　is　reduced,　as　seen　in　a　multi-bit　quantizers.　The　choppers,　working　in　conjunction　with　the　FIR　DAC,　effectively　suppresses　in-band　aliasing　noise　generated　by　the　chopper　in　the　first　integrator.　A　fast　comparator　serves　as　a　single-bit　quantizer,　and　the　9.2%　TS　loop　delay　eliminates　the　need　for　excess　loop　delay　compensation　in　the　modulator.　Energy　efficient　in-tegrators　are　implemented　using　the　current-starved　OTA.　The　CTDSM　prototype　was　fabricated　using　a　180-nm　CMOS　process,　achieving　a　90.5　dB　SNDR　and　96　dB　DR　with　a　24　kHz　signal　bandwidth.　The　power　con-sumption　is　210　&　mu;　W,　corresponding　to　a　Schreier　figure-of-merit　value　of　171.1　dB.