Currently,　no　efficient　implementation　scheme　for　the　ZUC　algorithm　S-box　has　been　found.　In　general,　it　is　implemented　through　lookup　tables,　while　such　operation　consumes　a　large　amount　of　hardware　resources　and　is　not　suitable　for　using　the　ZUC　algorithm　in　limited　environments.　In　response　to　these　shortcomings,　the　complete　circuit　implementation　of　S-box　of　ZUC　algorithm　and　the　in-place　implementation　of　linear　transformation　are　raised　in　this　study,　designated　to　effectively　reduce　the　resource　cost　of　the　ZUC　algorithm　circuit　implementation.　ZUC’s　S-box　is　composed　of　four　8×8　S-boxes,　i.e.,　S　=　(S0,S1,S2,S3),　where　S0　=　S2,　S1　=　S3.　Firstly,　this　study　uses　the　search　strategy　of　exhaustive　pruning　and　the　SAT-based　S-box　optimization　technique　to　give　the　efficient　implementation　of　three　P　transforms　in　the　S0,　and　then　obtains　an　S0　compact　circuit　implementation　for　the　first　time.　Secondly,　according　to　the　algebraic　expression　of　S1,　by　applying　several　advanced　combinatorial　logic　minimization　techniques,　720　cases　of　the　tower　field　representations　for　inverse　of　F28　field　under　normal　basis　are　studied,　and　the　compact　circuit　implementation　of　S1　is　obtained.　Compared　to　previous　implementation　methods　based　on　composite　field,　it　saves　25.48%　of　hardware　overhead.　Finally,　the　linear　transformation　in　ZUC　algorithm　is　converted　into　matrix　form,　and　its　in-place　implementation　is　obtained　by　using　the　heuristic　algorithm　of　optimizing　linear　matrix.　It　reduces　XOR　gates　by　34.77%　and　does　not　require　the　use　of　additional　auxiliary　bits.　The　research　is　of　a　positive　impact　on　the　circuit　implementation　of　ZUC　algorithm　in　traditional　environment　and　quantum　environment.　©　2024　Chinese　Association　for　Cryptologic　Research.　All　rights　reserved.