In　modern　circuits,　mixed-cell-height　standard　cells　have　been　prevailing　to　meet　various　requirements　and　achieve　better　trade-offs　among　timing,　power,　and　routability.　Besides,　the　constraints　of　the　minimum-implant-area　(MIA)　and　drain-to-drain-abutment　(DDA)　arise　as　emerging　challenges　at　advanced　technology　nodes.　In　this　paper,　we　present　an　algorithm　to　address　the　mixed-cell-height　placement　problem　with　MIA　and　DDA　constraints　in　three　major　stages:　(1)　post-global　placement,　(2)　legalization,　and　(3)　detailed　placement.　In　the　post-global　stage,　we　first　align　mixed-cell-height　standard　cells　to　the　desired　rows　by　conjugate　gradient　method　with　dynamic　step　size　and　then　reorder　them　by　the　shortest　path　algorithm　to　distribute　the　source　nodes　evenly.　In　the　legalization　stage,　we　propose　a　two-step　combination　algorithm　to　cluster　cells　and　repack　the　clusters　to　minimize　the　wirelength,　after　which　we　presented　a　queue　based　method　to　address　the　inter-row　MIA　violations.　In　the　detailed　placement,　an　MIA-aware　DDA　reduction　algorithm　is　adopted　after　multi-region　partitioning　to　eliminate　DDA　violations　without　introducing　MIA　violations.　Experimental　results　show　that　our　algorithm　can　resolve　all　MIA　and　almost　all　DDA　violations　with　a　13%　reduction　in　displacement,　a　4%　reduction　in　HPWL,　and　25%　less　runtime　compared　with　the　state-of-the-art　work.