Open-source　electronic　design　automation　(EDA)　shows　promising　potential　in　unleashing　EDA　innovation　and　lowering　the　cost　of　chip　design.　The　open-source　EDA　toolchain　is　a　comprehensive　set　of　software　tools　designed　to　facilitate　the　design,　analysis,　and　verification　of　electronic　circuits　and　systems.　We　developed　a　physical　design　EDA　toolchain　(named　iPD)　from　netlist　to　GDS-II,　including　design,　analysis,　and　verification.　iPD　now　covers　the　whole　flow　of　physical　design　(including　floorplan,　placement,　clock　tree　synthesis,　routing,　timing　optimization　etc.),　part　of　the　analysis　tools　(timing　analysis　and　power　analysis),　and　part　of　the　verification　tools　(design　rule　check).　For　more　friendly　support　EDA　research　and　development　and　chip　design,　we　design　a　reliability,　extendibility,　ease-of-use,　and　feature　richness　physical　design　toolchain.　This　paper　introduces　the　software　structure,　functions,　and　metrics　of　the　iPD　toolchain.