With　the　development　of　the　electronic　industry,　the　requirements　for　equipment　are　becoming　higher　and　higher　in　recent　years.　In　this　paper,　a　4-bit　absolute　value　detector　is　designed　to　have　a　low　delay　and　energy　consumption.　The　detector　is　composed　of　MUX,　an　adder,　and　a　comparator.　By　comparing　the　4-bit　input　with　the　given　threshold　value,　the　result　is　output.　Based　on　the　logic　effort　theory,　this　paper　calculates　the　logic　effort　and　parasitic　delay　of　each　stage　of　the　detector　and　uses　the　transmission　gate　logic　to　redesign　the　XOR　gate,　which　greatly　improves　its　performance.　Through　certain　calculations　and　optimization,　the　delay　and　energy　consumption　of　the　detector　is　reduced.　Finally,　this　paper　realizes　a　relatively　simple　4-bit　absolute　value　detection　circuit,　which　has　a　small　number　of　transistors　and　greatly　improves　the　performance　of　the　circuit.　At　the　same　time,　it　has　a　certain　reference　value　for　the　related　circuit　design.　©　Published　under　licence　by　IOP　Publishing　Ltd.