Covid-19　has　been　threatening　human　life　and　is　now　the　most　serious　public　health　issue　in　the　world.　During　this　pandemic,　wearing　masks　is　one　of　the　most　effective　ways　to　inhibit　virus　transmission.　However,　existing　ubiquitous　identity　recognition　requires　people　to　remove　their　masks　to　complete　facial　recognition,　which　is　highly　risky.　Iris　recognition,　as　a　safer　applicable　identification　method,　has　its　fatal　weakness　of　not　being　able　to　achieve　satisfactory　real-time　recognition　on　end　devices.　This　paper　presents　an　edge　deployment　of　a　low-power　iris　recognition　system　based　on　FPGA　with　approximate　multipliers.　We　adopted　a　serial-parallel　hybrid　method　for　the　preprocessing　stage,　trained　the　CNN　model　on　PC　and　then　deployed　the　architecture　and　parameters　on　FPGA.　We　further　reduced　power　and　resource　consumption　by　designing　approximate　multipliers　for　the　key　calculation.　Experimental　results　show　that　design　achieves　up　28%　and　43%　gain　in　terms　of　area　and　latency　energy　product,　while　incurring　a　negligible　accuracy　loss.　The　recognition　speed　increased　by　40%　compared　with　Raspberry　Pi,　11　times　better　than　Jetson　Nano　power　latency　production.　©　2021　Computer　Society　of　the　Republic　of　China.　All　rights　reserved.