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author:

Li, Weihao (Li, Weihao.) [1] | Zhu, Longguang (Zhu, Longguang.) [2] | Ji, Feng (Ji, Feng.) [3] | Yu, Jinling (Yu, Jinling.) [4] (Scholars:俞金玲) | Jin, Yufeng (Jin, Yufeng.) [5] | Wang, Wei (Wang, Wei.) [6]

Indexed by:

EI Scopus

Abstract:

In the past 60 years, integrated circuits have been developing in the direction of smaller size and higher integration under the guidance of Moore's law. However, the heat dissipation problem of the chip becomes prominent as the chip size decreases and the integration degree increases. Therefore, this paper presents a manifold microchannel interposer based on advanced packaging technology. Compared with traditional heat sink, the interposer has high heat dissipation performance, low flow resistance, strong compatibility with IC and small thickness. The micro-channel structure of the heat sink optimized by COMSOL™ simulation software and fabricated by etching, photolithography, silicon-silicon direct bonding, thin polishing and other microelectromechanical systems (MEMS). A stable and reliable thermal testing system is designed and tested for the thermal testing of heat sink. The test results show that when the input flow rate is 40 ml/min, the heat dissipation capacity can reaches 550 W/cm2, and the chip surface temperature is only 128 . © 2019 IEEE.

Keyword:

Chip scale packages Computer software Etching Heat resistance Heat sinks Integrated circuits MEMS Microchannels Thermal management (electronics)

Community:

  • [ 1 ] [Li, Weihao]Institute of Micro-Nano Devices &solar Cells, School of Physics and Information Engineering, Fuzhou University, Fuzhou, China
  • [ 2 ] [Li, Weihao]Institute of Microelectronics, Peking University, Beijing, China
  • [ 3 ] [Zhu, Longguang]Institute of Microelectronics, Peking University, Beijing, China
  • [ 4 ] [Ji, Feng]Beijing Institute of Remote Sensing Equipment, Beijing, China
  • [ 5 ] [Yu, Jinling]Institute of Micro-Nano Devices &solar Cells, School of Physics and Information Engineering, Fuzhou University, Fuzhou, China
  • [ 6 ] [Jin, Yufeng]Institute of Microelectronics, Peking University, Beijing, China
  • [ 7 ] [Jin, Yufeng]National Key Lab of Micro/Nano Fabrication Technology, Peking University, Beijing, China
  • [ 8 ] [Wang, Wei]Institute of Microelectronics, Peking University, Beijing, China
  • [ 9 ] [Wang, Wei]National Key Lab of Micro/Nano Fabrication Technology, Peking University, Beijing, China

Reprint 's Address:

  • [wang, wei]national key lab of micro/nano fabrication technology, peking university, beijing, china;;[wang, wei]institute of microelectronics, peking university, beijing, china

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Year: 2019

Page: 66-70

Language: English

Cited Count:

WoS CC Cited Count: 0

SCOPUS Cited Count: 2

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 4

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