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author:

Lin, Zhenkun (Lin, Zhenkun.) [1] | Liu, Genggeng (Liu, Genggeng.) [2] | Huang, Xing (Huang, Xing.) [3] | Lin, Yibo (Lin, Yibo.) [4] | Zhang, Jixin (Zhang, Jixin.) [5] | Liu, Wen-Hao (Liu, Wen-Hao.) [6] | Wang, Ting-Chi (Wang, Ting-Chi.) [7]

Indexed by:

SCIE

Abstract:

The Steiner minimum tree (SMT) serves as an optimal connection model for multiterminal nets in very large scale integration (VLSI). Constructing both rectilinear SMT (RSMT) and octilinear SMT (OSMT) are known to be NP-hard problems. Simultaneously, constructing multiple topologies of SMTs for a given net holds significant importance in alleviating routing constraints such as alleviating congestion and ensuring timing convergence. However, existing efforts predominantly focus on designing specialized methods to construct a specifically structured SMT for a given net, making it challenging to extend to different structures or topologies of SMTs, while also exhibiting insufficient optimization capabilities. In this work, we propose a unified approach based on deep reinforcement learning (DRL) to address both RSMT and OSMT problems while generating diverse routing topologies. First, we design an edge point sequence (EPS) that leverages the structural characteristics of SMT to connect the output of the deep learning model with the SMT structure. Second, we propose a deep learning model tailored for EPS, employing the negative wirelength of SMT as a reward to train the model using DRL. Third, we provide a corresponding rapid and accurate wirelength computation algorithm for evaluating the quality of the construction solution to expedite model training. Finally, we leverage the stochastic nature of machine learning to construct diverse SMT construction solutions. To the best of our knowledge, this is the first unified approach capable of simultaneously addressing both RSMT and OSMT problems while generating diverse solutions. The proposed unified approach demonstrates superior solution quality and higher efficiency compared to specifically designed algorithms.

Keyword:

Deep reinforcement learning (DRL) electronic design automation (EDA) physical design routing Steiner minimal tree

Community:

  • [ 1 ] [Lin, Zhenkun]Fuzhou Univ, Coll Comp & Data Sci, Fuzhou 350100, Peoples R China
  • [ 2 ] [Liu, Genggeng]Fuzhou Univ, Coll Comp & Data Sci, Fuzhou 350100, Peoples R China
  • [ 3 ] [Huang, Xing]Northwestern Polytech Univ, Sch Comp Sci, Xian 710072, Peoples R China
  • [ 4 ] [Lin, Yibo]Peking Univ, Sch Integrated Circuits, Beijing 430068, Peoples R China
  • [ 5 ] [Lin, Yibo]Peking Univ, Beijing Adv Innovat Ctr Integrated Circuits, Beijing 430068, Peoples R China
  • [ 6 ] [Zhang, Jixin]Hubei Univ Technol, Sch Comp Sci, Wuhan 430068, Peoples R China
  • [ 7 ] [Liu, Wen-Hao]NVIDIA Res Taiwan, Taipei 114, Taiwan
  • [ 8 ] [Wang, Ting-Chi]Natl Tsing Hua Univ, Dept Comp Sci, Hsinchu 30013, Taiwan

Reprint 's Address:

  • [Liu, Genggeng]Fuzhou Univ, Coll Comp & Data Sci, Fuzhou 350100, Peoples R China

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Source :

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

ISSN: 0278-0070

Year: 2025

Issue: 7

Volume: 44

Page: 2711-2724

2 . 7 0 0

JCR@2023

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count:

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 0

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