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author:

Liu, Qinghai (Liu, Qinghai.) [1] (Scholars:刘清海) | Lin, Disi (Lin, Disi.) [2] | Chen, Chuandong (Chen, Chuandong.) [3] (Scholars:陈传东) | He, Huan (He, Huan.) [4] | Chen, Jianli (Chen, Jianli.) [5] | Chang, Yao-Wen (Chang, Yao-Wen.) [6]

Indexed by:

CPCI-S EI Scopus

Abstract:

Escape routing is a critical problem in PCB routing, and its quality greatly affects the PCB design cost. Unlike the traditional escape routing that works mainly for the BGA package with unique line width and space, this paper presents a high-performance escape routing algorithm to handle problems with variable design rules and manual constraints, including variable line widths/spaces, the neck mode of wires, and the pad entry for differential pairs. We first propose a novel obstacle-avoiding method to project pins to the boundary and construct a channel projection graph. We then construct a bi-projection graph and propose a matching-based hierarchical sequencing algorithm to consider manual constraints. We perform global routing for each pin/differential pair by congestion-avoiding path initialization and rip-up and reroute path optimization. Finally, we complete detailed routing in every face, ensuring the wire angle and pad entry constraints. Experimental results show that our algorithm can achieve 100% routability without any design rule violation for all given industrial PCB instances, while two state-of-the-art routers cannot complete routing.

Keyword:

Community:

  • [ 1 ] [Liu, Qinghai]Fuzhou Univ, Ctr Discrete Math, Fuzhou 350108, Peoples R China
  • [ 2 ] [Liu, Qinghai]Fujian Sci & Technol Innovat Lab Optoelect Inform, Fuzhou, Fujian, Peoples R China
  • [ 3 ] [Lin, Disi]Fuzhou Univ, Dept Microelect, Fuzhou 350108, Peoples R China
  • [ 4 ] [Chen, Chuandong]Fuzhou Univ, Dept Microelect, Fuzhou 350108, Peoples R China
  • [ 5 ] [He, Huan]Hangzhou Huawei Enterprises Telecommun Technol Co, Hangzhou 310000, Peoples R China
  • [ 6 ] [Chen, Jianli]Fudan Univ, State Key Lab ASIC & Syst, Shanghai 200433, Peoples R China
  • [ 7 ] [Chang, Yao-Wen]Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 10617, Taiwan
  • [ 8 ] [Chang, Yao-Wen]Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan

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Source :

IEEE DESIGN AUTOMATION CONFERENCE, DAC

Year: 2023

Cited Count:

WoS CC Cited Count: 0

SCOPUS Cited Count: 1

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 0

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