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author:

Shen, J. (Shen, J..) [1] | Zhang, Y. (Zhang, Y..) [2] | Zhou, Y. (Zhou, Y..) [3]

Indexed by:

EI Scopus

Abstract:

To achieve high gain, low power consumption and low noise, An operational transconductance amplifier(OTA) connecting folded-cascode stage and class-AB stage with translinear loops is presented in this paper. Using 180nm CMOS library in terms of the parameters, the introduced OTA exhibits a transconductance gain of 112dB, the gain bandwidth of 4.9MHz, and the input referred noise of 5.1μ Vrms in the 1-100Hz range. The entire transconductance amplifier circuit consumes 28μW of power from a 1.8V supply when the bias source provides a current of 0.25μA and the input bias voltage is 900mV. © 2023 IEEE.

Keyword:

CMOS High-Gain Low-Power OTA Translinear Loop

Community:

  • [ 1 ] [Shen J.]Northeastern University, Shenyang, China
  • [ 2 ] [Zhang Y.]Fuzhou University, Fuzhou, China
  • [ 3 ] [Zhou Y.]Tongji University, Shanghai, China

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Year: 2023

Page: 1194-1200

Language: English

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count: 1

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 5

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