The　DRAM　performance　has　become　a　critical　bottleneck　of　modern　computing　systems.　Prior　studies　have　proposed　various　optimization　techniques　on　address　mapping　to　bridge　the　gap　between　real　performance　and　the　peak　performance.　Nevertheless,　these　techniques　have　some　common　limitations.　First,　most　of　them　focus　on　an　indirect　metric　(e.g.,　bitwise　flip　ratio)　and　fail　to　address　the　effects　of　complicated　organization　hierarchy　and　timing　constraints　of　DRAM.　Second,　these　approaches　do　not　leverage　application-specific　information　and　may　not　generate　the　proper　address　mapping　schemes　for　modern　applications.　In　this　article,　we　propose　Flatfish　as　a　comprehensive　solution　to　address　these　challenges.　Flatfish　is　a　self-adaptive　memory　controller　that　is　able　to　generate　address　mapping　schemes　according　to　the　memory　access　pattern.　Different　from　prior　approaches,　Flatfish　considers　complicated　memory　hierarchy,　including　channel,　rank,　and　bank　group　and　addressed　critical　timing　constraints.　By　mining　the　characteristics　from　the　memory　access　traces,　Flatfish　integrates　a　reinforcement　learning　model　to　generate　a　binary　invertible　matrix　(BIM)　as　the　address　mapping　scheme.　Flatfish　can　work　in　either　offline　mode　or　online　mode　to　meet　various　requirements　in　different　scenarios.　The　experimental　results　show　that　Flatfish　can　achieve　1.91x　speedup　in　the　offline　mode　on　GPU,　and　1.63x　speedup　in　the　online　mode　on　CPU,　over　the　commonly　used　Hynix　address　mapping　scheme.