With　the　recent　developments　in　the　internet　of　things　(IoT),　there　has　been　a　significant　rapid　generation　of　data.　Theoretically,　machine　learning　can　help　edge　devices　by　providing　a　better　analysis　and　processing　of　data　near　the　data　source.　However,　solving　the　nonlinear　optimisation　problem　is　time-consuming　for　IoT　edge　devices.　A　standard　method　for　solving　the　nonlinear　optimisation　problems　in　machine　learning　models　is　the　Broyden-Fletcher-Goldfarb-Shanno　(BFGS-QN)　method.　Since　the　field-programmable　gate　arrays　(FPGAs)　are　customisable,　reconfigurable,　highly　parallel　and　cost-effective,　the　present　study　envisaged　the　implementation　of　the　BFGS-QN　algorithm　on　an　FPGA　platform.　The　use　of　half-precision　floating-point　numbers　and　single-precision　floating-point　numbers　to　save　the　FPGA　resources　were　adopted　to　implement　the　BFGS-QN　algorithm　on　an　FPGA　platform.　The　results　indicate　that　compared　to　the　single-precision　floating-point　numbers,　the　implementation　of　the　mixed-precision　BFGS-QN　algorithm　reduced　27.1%　look-up　tables,　18.2%　flip-flops　and　17.9%　distributed　random　memory.　Copyright　©　2022　Inderscience　Enterprises　Ltd.