In　this　paper,　a　28GHz　two-stage　differential　power　amplifier　(PA)　with　two-way　power　combining　is　designed　in　65-nm　Silicon-On-Insulator　(SOI)　CMOS　technology.　Each　PA　cell　is　designed　for　high　linearity　while　maintaining　high　gain.　To　provide　adequate　output　power,　differential　cascode　structure　is　selected　for　power　stage,　while　the　driver　stage　adopts　differential　common　source　topology　for　boosting　the　power　gain.　In　the　differential　circuit,　neutralization　capacitor　is　added　to　compensate　the　parasitic　effect　of　gate-to-drain　capacitor　of　the　transistor　to　improve　the　gain,　while　the　inductive　degeneration　technique　is　adopted　to　increases　the　linearity.　The　impedance　matching　networks　is　implemented　by　transformers,　low　loss　signal　distribution　and　combining　are　achieved　by　coupling　line　balun.　The　simulation　results　demonstrate　a　23.5dBm　PA　saturated　output　power　with　45.7%　Power-Added　Efficiency　(PAE)　at　28-GHz,　while　the　1-dB　compression　output　power　(P1dB)　of　21.3　dBm,　and　gain　of　14.5　dB.　The　layout　size　of　the　power　amplifier　is　0.46　mm2,　and　the　core　area　is　0.252　mm2.　©　2021　IEEE.