This　study　presents　a　high-throughput　memory-based　Fast　Fourier　Transform/Inverse　Fast　Fourier　Transform　processor　for　Orthogonal　Frequency　Division　Multiplexing　systems.　Modified　single-path　delay　feedback　processor　is　proposed.　Compare　to　original　multi-path　delay　commutator　processor,　not　only　the　area　and　power　consumption　can　be　reduced,　also　whole　system　is　easy　to　dominate.　Besides,　this　new　method　of　calculating　twiddle　factor　decreases　the　complex　coefficients　and　reduces　the　ROM　usage　significantly.　Using　parallel　single-path　delay　feedback　with　mixed-radix　FFT　processor　increases　the　processing　speed　and　achieves　the　continuity　of　data　throughput.　The　design　is　mainly　a　comparison　with　multi-path　delay　commutator　processor　and　single-path　delay　feedback　processor　utilizing　the　base　memory　method.　Introduce　the　TSMC　0.18um　standard　cell　library;　we　achieve　a　128　point　FFT/IFFT　processor　with　high　throughput.　The　operating　frequency　is　up　to　50MHz.　Besides,　the　design　can　be　applied　to　3GPP　LTE　and　IEEE　802.16e　in　1.25MHz　bandwidth.　©　2015　IEEE.