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Abstract:
In this paper, we proposed a 32-bit improved adder combined with sparse tree by radix-2 and carry select. We designed its models-point operation, carry-out, 4-bit ripple-carry adder and 4-bit selector by reversible logic, and designed with smic0.18um process corresponding MOS circuit to achieve. The simulation results could verify that the algorithm and the design by reversible logic are right. © 2016 IEEE.
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Year: 2016
Language: English
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ESI Highly Cited Papers on the List: 0 Unfold All
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30 Days PV: 7
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