Existing　studies　mainly　focus　on　parallel　structures　and　FFT　circuit　designs　with　a　large　sample　sizes,　and　circuits　will　consume　a　lot　of　resources.　To　compensate　for　the　abovementioned　deficiencies,　this　paper　proposed　a　new　FFT　circuit　design　method　to　reach　the　low-resource　call　goal　of　the　FFT　circuit.　Under　the　framework　of　decimation-in-Time　(DIT)　butterfly　plot　of　8,192　sampling　points,　the　block　operation　scheme　of　recursive　structure　was　adopted,　and　Euler＇s　formula　was　used　to　optimize　rotation　factors　in　the　butterfly　plot.　Results　show　that　the　proposed　FFT　design　method　in　this　paper　can　save　register　(REG)　quantity　by　about　96.87%　and　look-up-Table　(LUT)　quantity　by　an　average　of　about　98.75%　under　the　same　quantity　of　sampling　points,　thus,　resource　call　is　reduced　by　a　large　margin.　The　study　scheme　can　provide　a　reference　for　low　resource　call　design　of　the　FFT　circuit.　©　2020　ACM.