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author:

Li, Fanyang (Li, Fanyang.) [1] (Scholars:李凡阳) | Jiang, Hao (Jiang, Hao.) [2]

Indexed by:

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Abstract:

A hearing aid on-chip system based on accuracy optimized front- and back-end blocks is presented for enhancing the signal processing accuracy of the hearing aid. Compared with the conventional system, the accuracy optimized system is characterized by the dual feedback network and the gain compensation technique used in the front- and back-end blocks, respectively, so as to alleviate the nonlinearity distortion caused by the output swing. By using the technique, the accuracy of the whole hearing aid system can be significantly improved. The prototype chip has been designed with a 0.13 μm standard CMOS process and tested with 1 V supply voltage. The measurement results show that, for driving a 16 Ω loudspeaker with a normalized output level of 300 mVp-p, the total harmonic distortion reached about -60 dB, achieving at least three times reduction compared to the previously reported works. In addition, the typical input referred noise is only about 5 μVrms. © 2014 Chinese Institute of Electronics.

Keyword:

Audition CMOS integrated circuits Hearing aids Optimization Signal processing

Community:

  • [ 1 ] [Li, Fanyang]Key Laboratory of Microelectronics of Fujian Province, Fuzhou University, Fuzhou 350002, China
  • [ 2 ] [Jiang, Hao]Key Laboratory of Microelectronics of Fujian Province, Fuzhou University, Fuzhou 350002, China

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Source :

Journal of Semiconductors

ISSN: 1674-4926

CN: 11-5781/TN

Year: 2014

Issue: 3

Volume: 35

4 . 8 0 0

JCR@2023

Cited Count:

WoS CC Cited Count: 0

SCOPUS Cited Count: 2

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 0

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