In　this　study,　an　area-efficient　8-channel　128-point　fast　Fourier　transform　(FFT)　processor　is　proposed　for　IEEE　802.11ac　standard　MIMO-OFDM　system.　The　proposed　FFT　processor　is　based　on　mixed-radix　multi-path　delay　commutator　(MRMDC)　architecture　and　supports　eight　spatial　data　streams.　Using　input　memory　array　transpose　architecture　and　a　bit-reversal　circuit,　the　proposed　FFT　processor　can　generate　eight　input　and　output　spatial　data　streams　in　natural　order.　Therefore,　the　processor　can　be　used　directly　in　MIMO-OFDM　systems　without　additional　input　or　output　RAM.　The　proposed　FFT　processor　is　designed　using　hardware　description　language　and　synthesized　to　a　gate-level　circuit　using　a　TSMC　90-nm　CMOS　standard　cell　library.　Compared　with　other　8-channel　MRMDC　FFT　processors,　the　proposed　FFT　processor　can　reduce　the　logic　gate　count　of　the　MRMDC　module　by　approximately　12.5%.