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Abstract:
Achieving high efficiency over a wide range of input voltages for digital signal processing modules is a key focus in integrated electronic system applications. This paper proposes a current-feedback low-dropout (LDO) voltage regulator functioning in parallel with a step-down switched capacitor DC-DC converter to implement a smart power management in 180 nm CMOS technology. The proposed switched capacitor DC-DC converter is divided into four cell to reduce the output voltage ripple. The smart power management delivers a 0.71 V power supply with an efficiency as high as 69.4% while maintaining tolerable ripple, and operates over a wide input voltage range of 1.1 V-3.0 V while occupying only 1.5 mm(2). The highest value of ripple is only 14 mV. Measurement results confirm that the proposed implementation achieves a higher efficiency and wider input voltage range than conventional implementations.
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MICROELECTRONICS JOURNAL
ISSN: 0026-2692
Year: 2019
Volume: 87
Page: 121-126
1 . 4 0 5
JCR@2019
1 . 9 0 0
JCR@2023
ESI Discipline: ENGINEERING;
ESI HC Threshold:150
CAS Journal Grade:4
Cited Count:
WoS CC Cited Count: 3
SCOPUS Cited Count: 3
ESI Highly Cited Papers on the List: 0 Unfold All
WanFang Cited Count:
Chinese Cited Count:
30 Days PV: 1
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