Query：
学者姓名：杨小玲
Refining：
Year
Type
Indexed by
Source
Complex
Former Name
Co-
Language
Clean All
Abstract ：
A 4-tap coefficient, 8-neighborhood subpixel search algorithm is presented in this paper to simplify hardware implementation. This algorithm is intended to be used for the fraction motion estimation module of the AV1 video coding standard. A 32 × 32 block is used as the fundamental unit for searching and interpolation in hardware implementation. Blocks of the same MV are combined in a merge grouping method to perform subpixel searches, improving search efficiency. The search method for the eight subpixel points of the current MV in a clockwise order is used to realize continuous reading data without stopping the flow, improving the work efficiency of the pipeline. Finally, a shift-and-add method is employed to implement the multiplication calculation of fixed coefficients, fully utilizing the common factor between the coefficients to reuse part of the circuit and other approaches to effectively reduce the expenditure of hardware. The interpolation and searching process of subpixels is implemented in Verilog HDL, and synthesis is performed using Design Compiler under 55 nm process conditions at SMIC with an operating frequency of up to 200 MHz, an area of 5894809.13 µm2, and a power consumption of 352.21 mW. © 2025 SPIE.
Keyword ：
Digital storage Digital storage Image coding Image coding Image segmentation Image segmentation Interpolation Interpolation Motion estimation Motion estimation Program compilers Program compilers Time difference of arrival Time difference of arrival Video signal processing Video signal processing
Cite：
Copy from the list or Export to your reference management。
| GB/T 7714 | Chen, Yimeng , Shi, Long-Zhao , Lin, Zedeng et al. Hardware implementation of AV1 fraction motion estimation [C] . 2025 . |
| MLA | Chen, Yimeng et al. "Hardware implementation of AV1 fraction motion estimation" . (2025) . |
| APA | Chen, Yimeng , Shi, Long-Zhao , Lin, Zedeng , Zhang, Lijing , Yang, Xiaoling . Hardware implementation of AV1 fraction motion estimation . (2025) . |
| Export to | NoteExpress RIS BibTex |
Version ：
Abstract ：
针对帧间预测重构时,因编码树单元(CTU)尺寸增大和划分层次增加,完成全部变换块变换所需要的时钟周期显著增多的问题,提出一种既可以实现单一变换块的变换与反变换,又可以对尺寸为 32 px×32 px、基于高效视频编码标准(HEVC)四叉树划分的混合块进行变换与反变换的硬件架构.采用多层次蝶形架构与混合矩阵乘法器对混合输入数据进行逐级分解并运算.实验结果显示,其数据流动与单一变换块一致.在Altera的Stratix Ⅲ器件下综合工作频率为 189.47 MHz;在Synopsys的SAED 90-nm器件库下用逻辑综合工具(DC)综合工作频率为 140 MHz,逻辑门数为 1.30×105;混合块变换每个时钟始终可以处理 32 点数据.
Keyword ：
现场可编程门阵列 现场可编程门阵列 硬件架构 硬件架构 离散余弦变换 离散余弦变换 逻辑综合 逻辑综合 高效视频编码 高效视频编码
Cite：
Copy from the list or Export to your reference management。
| GB/T 7714 | 兰尔铭 , 施隆照 , 宋佳柔 et al. 可用于HEVC视频编码器的混合输入DCT变换器设计 [J]. | 福州大学学报（自然科学版） , 2023 , 51 (4) : 505-511 . |
| MLA | 兰尔铭 et al. "可用于HEVC视频编码器的混合输入DCT变换器设计" . | 福州大学学报（自然科学版） 51 . 4 (2023) : 505-511 . |
| APA | 兰尔铭 , 施隆照 , 宋佳柔 , 杨小玲 . 可用于HEVC视频编码器的混合输入DCT变换器设计 . | 福州大学学报（自然科学版） , 2023 , 51 (4) , 505-511 . |
| Export to | NoteExpress RIS BibTex |
Version ：
Abstract ：
Thanks to its flexible coding structure, high-efficiency video coding (HEVC) can save more coding bit rates than the previous standard, H.264. However, it also increases the complexity of integer-pixel motion estimation (IME). To speed up the encoding process, we propose a parallel spiral search (PSS) algorithm, which features the following characteristics and advantages. First, the proposed algorithm is hardware-friendly. PSS has both a fix search order that cuts the correlation between search points and a high data reuse level that facilitates the pipeline application in hardware implementation. Second, the PSS algorithm processes all prediction units (PU) blocks in parallel, which speeds up the RD calculation. Finally, the early termination strategy is proposed to end the search for unnecessary search points and further reduce search time. Experimental results show that the proposed algorithm outperforms other popular hardware-oriented IME algorithms in terms of coding speed, with the same loss of RD performance. Compared with the default full search algorithm (FSA) in the HEVC test model HM-16.7, the proposed algorithm achieves average time saving ratio of up to 92.55%, with BD-PSNR loss of 0.056 dB and an increase by 1.38% in terms of BD-BR.
Keyword ：
Hardware-friendly motion estimation Hardware-friendly motion estimation HEVC HEVC Inter prediction Inter prediction Parallel spiral search Parallel spiral search
Cite：
Copy from the list or Export to your reference management。
| GB/T 7714 | Shi, Long-Zhao , Zhang, Zhiyong , Luo, Long et al. Parallel spiral search algorithm applied to integer motion estimation [J]. | SIGNAL PROCESSING-IMAGE COMMUNICATION , 2021 , 95 . |
| MLA | Shi, Long-Zhao et al. "Parallel spiral search algorithm applied to integer motion estimation" . | SIGNAL PROCESSING-IMAGE COMMUNICATION 95 (2021) . |
| APA | Shi, Long-Zhao , Zhang, Zhiyong , Luo, Long , Yang, Xiuzhi , Chen, Zhifeng , Yang, Xiaoling et al. Parallel spiral search algorithm applied to integer motion estimation . | SIGNAL PROCESSING-IMAGE COMMUNICATION , 2021 , 95 . |
| Export to | NoteExpress RIS BibTex |
Version ：
Abstract ：
从"模拟电路"课程思政的意义出发,结合课程思政的建设目标,分析思政教育与"模拟电路"教学在家国情怀、人生观及价值观、大国工匠精神、能力培养等方面的融合点.探索"模拟电路"课程思政的教学方法和课程评价体系,在传授专业知识的同时,提升学生的政治思想素养及创新能力,培养学生严格的工匠精神.
Keyword ：
教学探索 教学探索 模拟电路课程 模拟电路课程 课程思政 课程思政
Cite：
Copy from the list or Export to your reference management。
| GB/T 7714 | 杨小玲 . "模拟电路"课程思政的教学探索 [J]. | 电气电子教学学报 , 2021 , 43 (2) : 34-36,66 . |
| MLA | 杨小玲 . ""模拟电路"课程思政的教学探索" . | 电气电子教学学报 43 . 2 (2021) : 34-36,66 . |
| APA | 杨小玲 . "模拟电路"课程思政的教学探索 . | 电气电子教学学报 , 2021 , 43 (2) , 34-36,66 . |
| Export to | NoteExpress RIS BibTex |
Version ：
Abstract ：
本实用新型涉及一种三输入n位二进制加法器。包括n个用于将输入的3个二进制数相同权重的位进行一次3 : 2压缩的3 : 2压缩器电路，以及一个用于将压缩器电路输出的数进行加法操作的加法器电路。本实用新型不仅硬件开支上少于传统加法器，而且极限工作频率高于传统加法器。
Cite：
Copy from the list or Export to your reference management。
| GB/T 7714 | 杨小玲 . 三输入n位二进制加法器 : CN201920252575.0[P]. | 2019/2/28 . |
| MLA | 杨小玲 . "三输入n位二进制加法器" : CN201920252575.0. | 2019/2/28 . |
| APA | 杨小玲 . 三输入n位二进制加法器 : CN201920252575.0. | 2019/2/28 . |
| Export to | NoteExpress RIS BibTex |
Version ：
Abstract ：
For the problem of serious spurious signal interference in the current MultistAge noise SHaping (MASH) structure, this study proposes an improved structure that absorbs and synthesizes the advantages of Prime-Modulus MASH (PM-MASH) and Song and Park’s MASH (SP-MASH) structures. For all initial states and constant digital inputs, the structure produces the maximum sequence length. The proposed structure (we call it SH-MASH) cascades several first-order 1-bit error feedback modulators, such as the SP-MASH structure, but it has prime-modulus quantization interval. SH-MASH structure is simulated on MATLAB. Simulation results show that the proposed architecture has a better noise-shaping capability than the PM-MASH and SP-MASH structures at the same modulator word length. SH-MASH structure is comparable to the Hosseini and Kennedy’s MASH (HK-MASH) structure, which is recognized as the best structure in the current industry; however, SH-MASH structure has a simpler structure. © 2019, ICIC International. All rights reserved.
Keyword ：
Delta-Sigma Modulator (DSM); MultistAge noise SHaping (MASH); Prime-modulus quantizers Delta-Sigma Modulator (DSM); MultistAge noise SHaping (MASH); Prime-modulus quantizers
Cite：
Copy from the list or Export to your reference management。
| GB/T 7714 | Yang, X. , Huang, Y. , Yin, Y. et al. A maximum sequence length mash digital delta-sigma modulators [J]. | ICIC Express Letters , 2019 , 13 (2) : 103-111 . |
| MLA | Yang, X. et al. "A maximum sequence length mash digital delta-sigma modulators" . | ICIC Express Letters 13 . 2 (2019) : 103-111 . |
| APA | Yang, X. , Huang, Y. , Yin, Y. , Shi, L.-Z. . A maximum sequence length mash digital delta-sigma modulators . | ICIC Express Letters , 2019 , 13 (2) , 103-111 . |
| Export to | NoteExpress RIS BibTex |
Version ：
Abstract ：
该文以大学生竞赛与自主创新开放实验平台为切入点,以福州大学为例探讨开放实验平台建设.将开放体系解构为多维度和多模式进行分析,并根据每个问题提出了相应的解决办法.
Keyword ：
创新 创新 实验平台 实验平台 开放实验 开放实验 翻转课堂 翻转课堂 虚拟仪器 虚拟仪器
Cite：
Copy from the list or Export to your reference management。
| GB/T 7714 | 张昂 , 杨小玲 . 大学生竞赛与自主创新开放实验平台建设 [J]. | 实验科学与技术 , 2016 , 14 (2) : 205-206 . |
| MLA | 张昂 et al. "大学生竞赛与自主创新开放实验平台建设" . | 实验科学与技术 14 . 2 (2016) : 205-206 . |
| APA | 张昂 , 杨小玲 . 大学生竞赛与自主创新开放实验平台建设 . | 实验科学与技术 , 2016 , 14 (2) , 205-206 . |
| Export to | NoteExpress RIS BibTex |
Version ：
Abstract ：
本发明涉及一种高速单总线通信的实现方法, 基于SDI信号线进行数据的双向传输，所述SDI信号线连接主机与从机；所述主机通过SDI信号线发送信号，所述从机根据接收到的信号自动适配接收速率与通信的开启与停止，形成SAOW总线主从结构；所述数据的双向传输采用命令帧结构传输数据信息，所述命令帧包括帧头、从机地址、寄存器地址、数据长度、数据、帧尾。本发明可以实现单总线双向通信，且不要求通信双方采用固定的波特率，波特率随时可变，可实用于工作频率不稳的场合。
Cite：
Copy from the list or Export to your reference management。
| GB/T 7714 | 施隆照 , 杨小玲 . 一种高速单总线通信的实现方法 : CN201510151729.3[P]. | 2015/4/2 . |
| MLA | 施隆照 et al. "一种高速单总线通信的实现方法" : CN201510151729.3. | 2015/4/2 . |
| APA | 施隆照 , 杨小玲 . 一种高速单总线通信的实现方法 : CN201510151729.3. | 2015/4/2 . |
| Export to | NoteExpress RIS BibTex |
Version ：
Abstract ：
在分析铂电阻测温正反馈线性化电路输出特性的基础上,研究了不同拟合直线对其输出非线性的影响,给出提高测温区域输出信号线性度及灵敏度的设计方法.与传统的三点线性拟合设计法相比,该方法有效地提高电路的测温精度,且简单实用,可满足工业过程高精度测温的需要.
Keyword ：
最佳线性特性 最佳线性特性 最大灵敏度 最大灵敏度 正反馈 正反馈 线性度 线性度 铂电阻测温电路 铂电阻测温电路
Cite：
Copy from the list or Export to your reference management。
| GB/T 7714 | 杨小玲 , 施隆照 . 铂电阻测温正反馈线性化的研究与设计 [J]. | 仪表技术与传感器 , 2012 , (9) : 1-2,12 . |
| MLA | 杨小玲 et al. "铂电阻测温正反馈线性化的研究与设计" . | 仪表技术与传感器 9 (2012) : 1-2,12 . |
| APA | 杨小玲 , 施隆照 . 铂电阻测温正反馈线性化的研究与设计 . | 仪表技术与传感器 , 2012 , (9) , 1-2,12 . |
| Export to | NoteExpress RIS BibTex |
Version ：
Abstract ：
设计基于半导体致冷的湿度控制系统,包括湿度线性检测变送电路、半导体致冷器件的驱动电路、制冷模块的最佳工作状态设计.在60%～90%(BH)湿度范围内,系统的控湿精度达±3%(RH).
Keyword ：
半导体致冷 半导体致冷 控湿 控湿 湿敏电阻 湿敏电阻 线性化 线性化
Cite：
Copy from the list or Export to your reference management。
| GB/T 7714 | 杨小玲 , 施隆照 . 半导体致冷控湿系统的研究 [J]. | 福州大学学报（自然科学版） , 2007 , 35 (2) : 210-213 . |
| MLA | 杨小玲 et al. "半导体致冷控湿系统的研究" . | 福州大学学报（自然科学版） 35 . 2 (2007) : 210-213 . |
| APA | 杨小玲 , 施隆照 . 半导体致冷控湿系统的研究 . | 福州大学学报（自然科学版） , 2007 , 35 (2) , 210-213 . |
| Export to | NoteExpress RIS BibTex |
Version ：
Export
| Results： |
Selected to |
| Format： |
