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学者姓名：阴亚东
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Abstract ：
People's increasing demand for high-quality network services has prompted the continuous attention and development of network traffic classification (NTC). In recent years, deep flow inspection (DFI) is considered to be the most effective and promising method to solve the NTC. However, DFI still cannot effectively address the problem of changes in flow characteristics of complex packet flows and the discovery of new traffic categories. In this paper, we propose a metric learning based deep learning solution with feature compressor, named deep flow embedding (DFE). The feature compressor is used to compress the feature information transmitted layer by layer in DL backbone while maintaining the computational accuracy, so that the backbone can remove as much noise, redundancy, and other irrelevant information from the input data as possible, and achieve more robust feature extraction of network traffic flow. The deep learning (DL) backbone generates an embedding vector for each network packet flow. Then the embedding vector is compared with the vector template preset for each traffic type in the template library to determine the category of the packet flow. Experimental results verify that our method is more effective than the traditional DFI methods in overcoming the problems of flow characteristics variation and new category discovery.
Keyword ：
deep flow embedding deep flow embedding deep learning deep learning Deep learning Deep learning feature compression feature compression Feature extraction Feature extraction Inspection Inspection Libraries Libraries Measurement Measurement metric learning metric learning Network traffic classification Network traffic classification Noise Noise Protocols Protocols Robustness Robustness Telecommunication traffic Telecommunication traffic Vectors Vectors
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| GB/T 7714 | Wang, Zhijiong , Zhang, Anguo , Li, Hung Chun et al. DFE: Deep Flow Embedding for Robust Network Traffic Classification [J]. | IEEE TRANSACTIONS ON NETWORK SCIENCE AND ENGINEERING , 2025 , 12 (3) : 1597-1612 . |
| MLA | Wang, Zhijiong et al. "DFE: Deep Flow Embedding for Robust Network Traffic Classification" . | IEEE TRANSACTIONS ON NETWORK SCIENCE AND ENGINEERING 12 . 3 (2025) : 1597-1612 . |
| APA | Wang, Zhijiong , Zhang, Anguo , Li, Hung Chun , Yin, Yadong , Chen, Wei , Lam, Chan Tong et al. DFE: Deep Flow Embedding for Robust Network Traffic Classification . | IEEE TRANSACTIONS ON NETWORK SCIENCE AND ENGINEERING , 2025 , 12 (3) , 1597-1612 . |
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目的 加快中医望诊装置在社区家庭等场景中的应用普及.方法 开展了复杂背景下便携式标准化高清面舌图像采集装置研究.完成了装置的硬件设计,其尺寸为20 ×22 ×23cm3,达到了便携性要求.基于现有Mediapipe人脸特征检测算法和飞行时间(ToF)测距算法,提出了一种智能感知算法以获取使用者脸部区域的纵深、水平、垂直等3维度的位置信息;提出一种实时摄像头位移测速算法以实现其快速升降;将查找表与爬坡算法相结合,实现了一种摄像头快速自动变焦对焦算法;基于Haar级联分类器完成了一款轻量级舌体检测模型的设计;实验结果显示,在同等硬件资源下本文舌体检测模型准确率和漏检率基本与YOLOv5算法相当,但其速度提升了约23倍.结果 通过装置的语音引导和摄像头位置自适应调整,30位未经培训人员能够快速完成位姿纠正及面舌像的标准化图像采集,平均采集时间为33秒.结论 为中医望诊面舌图像采集装置的推广提供了一种新思路.
Keyword ：
Haar级联分类器 Haar级联分类器 中医面舌诊 中医面舌诊 位姿纠正 位姿纠正 图像识别 图像识别
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| GB/T 7714 | 胡真骁 , 杨朝阳 , 吴长汶 et al. 便携式复杂背景下标准化高清面舌图像采集装置研究 [J]. | 时珍国医国药 , 2024 , 35 (15) : 3493-3497 . |
| MLA | 胡真骁 et al. "便携式复杂背景下标准化高清面舌图像采集装置研究" . | 时珍国医国药 35 . 15 (2024) : 3493-3497 . |
| APA | 胡真骁 , 杨朝阳 , 吴长汶 , 伍明诚 , 王仁平 , 阴亚东 . 便携式复杂背景下标准化高清面舌图像采集装置研究 . | 时珍国医国药 , 2024 , 35 (15) , 3493-3497 . |
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The leadless multichamber pacemaker offers significant advantages in treating arrhythmias and enhancing cardiac function. Intracardiac communication is essential for ensuring coordinated pacing of multi-chamber pacemakers that do not have leadless technology. However, the dynamic changes in the intracardiac channel present a significant challenge. Hence, mastering the dynamic characteristics of intracardiac channels and accurately modeling them is crucial. In this paper, we introduce a validated intracardiac channel equivalent circuit model that accounts for the electrical characteristics of cardiac tissue and the volume fluctuations in cardiac chambers. The results demonstrate that the agreement coefficient between the circuit model and the in vitro pig heart model reached 80.7% in the time domain. The proposed equivalent circuit model demonstrates high accuracy and stability in addressing the challenge of dynamic changes in intracardiac channels and simplifying in vivo or in vitro experiments.
Keyword ：
dynamic equivalent circuit models dynamic equivalent circuit models intracardiac circuit phantom intracardiac circuit phantom intracardiac communication intracardiac communication leadless pacemakers leadless pacemakers
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| GB/T 7714 | Li, Dongming , Wang, Jiamei , Mou, Pedro Antonio et al. Dynamic Equivalent Circuit Models for Intracardiac Communication in Leadless Pacemakers [J]. | 9TH EUROPEAN MEDICAL AND BIOLOGICAL ENGINEERING CONFERENCE, VOL 1, EMBEC 2024 , 2024 , 112 : 336-345 . |
| MLA | Li, Dongming et al. "Dynamic Equivalent Circuit Models for Intracardiac Communication in Leadless Pacemakers" . | 9TH EUROPEAN MEDICAL AND BIOLOGICAL ENGINEERING CONFERENCE, VOL 1, EMBEC 2024 112 (2024) : 336-345 . |
| APA | Li, Dongming , Wang, Jiamei , Mou, Pedro Antonio , Yin, Yadong , Pun, Sio Hang , Mak, Peng Un et al. Dynamic Equivalent Circuit Models for Intracardiac Communication in Leadless Pacemakers . | 9TH EUROPEAN MEDICAL AND BIOLOGICAL ENGINEERING CONFERENCE, VOL 1, EMBEC 2024 , 2024 , 112 , 336-345 . |
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为解决CLAHE算法硬件资源消耗量大的问题,从硬件实现的角度对算法进行两方面改进.针对裁剪阈值,提出了一种普适性裁剪阈值确定方法,基于信息熵和结构相似性构造了品质因数,以品质因数最佳作为评判标准确定硬件实现中的裁剪阈值,在平衡图像增强对比度和失真度的同时,避免消耗硬件资源对图像数据本身进行大量计算.针对超阈值像素再分配,提出了一种改进型分配方法,将超阈值像素仅均分给未超阈值的灰度级,且若其再次超阈值则停止分配,在降低图像失真度的同时,避免反复像素分配带来的硬件开销.在改进型CLAHE算法的基础上,完成基于FPGA的低照度图像增强系统实现,实验结果表明,在普适性裁剪阈值下,增强后的图像能够普遍获得更高的品质因数,具有更佳的综合效果;改进型像素再分配方法对比常规方法,图像在信息熵平均损失3.28％的代价下结构相似性可平均提升8.88％;低照度图像增强系统可实现640×480@60 fps的图像采集与处理.本设计可为图像增强算法的硬件实现提供一种新的参考.
Keyword ：
CLAHE改进算法 CLAHE改进算法 FPGA FPGA 像素再分配 像素再分配 图像增强 图像增强 裁剪阈值 裁剪阈值
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| GB/T 7714 | 林立芃 , 杨朝阳 , 伍明诚 et al. 改进型CLAHE图像增强算法及其FPGA实现 [J]. | 电子测量技术 , 2024 , 47 (10) : 126-133 . |
| MLA | 林立芃 et al. "改进型CLAHE图像增强算法及其FPGA实现" . | 电子测量技术 47 . 10 (2024) : 126-133 . |
| APA | 林立芃 , 杨朝阳 , 伍明诚 , 王仁平 , 阴亚东 . 改进型CLAHE图像增强算法及其FPGA实现 . | 电子测量技术 , 2024 , 47 (10) , 126-133 . |
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A frequency-locked loop (FLL) is proposed to provide a real-time frequency calibration for OOK power oscillator transmitters. This FLL incorporates a pulse-width detector (PWD) based on Time-Registers (TRs) to discriminate accurately between the carrier frequency and the preset target frequency during the data modulation. As a result, frequency calibration can be performed simultaneously with data modulation without interruption. A prototype of an OOK power oscillator transmitter integrated with the proposed FLL is implemented with onboard discrete electronic elements for demonstration. The measurement indicates that the FLL can accurately lock to a carrier frequency of 160MHz despite electromagnetic (EM) interference in the loop antenna of the transmitter. In contrast, with EM interference and charge leakage, the carrier frequency differs from the expected value by about 1 MHz when the FLL is disabled.
Keyword ：
Frequency-locked loop (FLL) Frequency-locked loop (FLL) OOK modulation OOK modulation power oscillator transmitter power oscillator transmitter pulse-width detection pulse-width detection time register time register
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| GB/T 7714 | Yin, Yadong , Zhang, Zehui , Xiao, Weiming et al. An FLL Providing Real-Time Frequency Calibration for OOK Power Oscillator Transmitters [J]. | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS , 2023 , 70 (9) : 3233-3237 . |
| MLA | Yin, Yadong et al. "An FLL Providing Real-Time Frequency Calibration for OOK Power Oscillator Transmitters" . | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS 70 . 9 (2023) : 3233-3237 . |
| APA | Yin, Yadong , Zhang, Zehui , Xiao, Weiming , Fu, Ximing , El-Sankary, Kamal , Pun, Sio-Hang . An FLL Providing Real-Time Frequency Calibration for OOK Power Oscillator Transmitters . | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS , 2023 , 70 (9) , 3233-3237 . |
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Abstract ：
本发明涉及一种间歇式频率校准OOK调制发射机电路，包括压控振荡器VCO、环路分频器、时钟发生器、鉴频器、相位差‑电压转换器和发射天线；所述鉴频器与环路分频器、时钟发生器、相位差‑电压转换器分别连接；所述压控振荡器VCO与发射天线、环路分频器、时钟发生器、相位差‑电压转换器分别连接；所述环路分频器还与时钟发生器、发射天线分别连接；所述发射机电路输入为待发射2进制数据信号DATA以及系统时钟CKs，输出为经过OOK调制后的射频信号RFO。本发明频率校准速度快，校准精度高，功耗小，可间歇性频率校准。
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| GB/T 7714 | 阴亚东 , 张泽辉 , 黄怡涛 et al. 一种间歇式频率校准OOK调制发射机电路及控制方法 : CN202210047289.7[P]. | 2022-01-17 00:00:00 . |
| MLA | 阴亚东 et al. "一种间歇式频率校准OOK调制发射机电路及控制方法" : CN202210047289.7. | 2022-01-17 00:00:00 . |
| APA | 阴亚东 , 张泽辉 , 黄怡涛 , 肖维明 , 陈志璋 . 一种间歇式频率校准OOK调制发射机电路及控制方法 : CN202210047289.7. | 2022-01-17 00:00:00 . |
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An integrated lock-in amplifier (LIA) with automatic phase tuning and second-order harmonic frequency extraction is presented in this paper. The automatic phase alignment loop implemented in the proposed single-channel LIA can directly align the phases of an input signal with a reference signal. Furthermore, the proposed LIA system also includes an enhanced signal detection method in which the 2(nd) harmonics of the carrier frequency (omega(ref)) is applied. As opposed to conventional LIA, this method reduces flicker noise and input offset effects that limit the signal-to-noise ratio (SNR). In terms of signal power detection, the proposed single-channel LIA architecture does not require phase synchronization between input and reference signals. The circuit is designed for a reference frequency of 100 Hz, suitable for biomedical applications. The LIA is Implemented using 0.18-mu m CMOS technology with a single power supply voltage of 1.8 V. The system consumes 360 mu W at an operating frequency of 100 Hz and presents a high input sensitivity dynamic range for a detection bandwidth of 50 Hz and a FOM of 116 dB.
Keyword ：
automatic phase tuning automatic phase tuning finite-state machine finite-state machine flicker noise flicker noise Lock-in amplifier Lock-in amplifier SAR SAR semi-digital semi-digital switch capacitor integrator switch capacitor integrator
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| GB/T 7714 | Fu, Ximing , Colombo, Dalton Martini , Alamdari, Hamed Hanafi et al. Lock-In Amplifier for Sensor Application Using Second Order Harmonic Frequency With Automatic Background Phase Calibration [J]. | IEEE SENSORS JOURNAL , 2022 , 22 (16) : 16067-16080 . |
| MLA | Fu, Ximing et al. "Lock-In Amplifier for Sensor Application Using Second Order Harmonic Frequency With Automatic Background Phase Calibration" . | IEEE SENSORS JOURNAL 22 . 16 (2022) : 16067-16080 . |
| APA | Fu, Ximing , Colombo, Dalton Martini , Alamdari, Hamed Hanafi , Yin, Yadong , El-Sankary, Kamal . Lock-In Amplifier for Sensor Application Using Second Order Harmonic Frequency With Automatic Background Phase Calibration . | IEEE SENSORS JOURNAL , 2022 , 22 (16) , 16067-16080 . |
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为了满足便携式电子产品的需求,设计了一种电流叠加型无损电流检测器和基于该检测器的升压型变换器.该电流检测器采用并联于电感两端的RC网络将电感电流转换成电压信号而实现电流的无损检测,利用电压-电流转换电路将检测电压和斜坡补偿电压转换为电流进行叠加并转换成电压作为最终检测结果.与现有电流检测器相比,该电流检测器具有结构简单、功率损耗小、精度高、响应速度快等优点.基于SMIC 0.18μm CMOS工艺完成了整体电路设计和版图参数提取后仿真验证.后仿真结果显示,当电感电流在0～600 mA范围内变化时,电流检测器检测误差小于2.9％,功耗仅为0.05 mW;当输入电压为3 V时,在100 mA输出电流下变换器转换效率可达92％,负载调整率和线性调整率分别为0.51％和0.23％.
Keyword ：
升压型变换器 升压型变换器 斜坡补偿技术 斜坡补偿技术 无损电流检测 无损电流检测 电流叠加技术 电流叠加技术
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| GB/T 7714 | 许亦云 , 张利红 , 阴亚东 . 一种基于电流叠加型无损电流检测的升压型变换器 [J]. | 电子元件与材料 , 2022 , 41 (10) : 1072-1077 . |
| MLA | 许亦云 et al. "一种基于电流叠加型无损电流检测的升压型变换器" . | 电子元件与材料 41 . 10 (2022) : 1072-1077 . |
| APA | 许亦云 , 张利红 , 阴亚东 . 一种基于电流叠加型无损电流检测的升压型变换器 . | 电子元件与材料 , 2022 , 41 (10) , 1072-1077 . |
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This article proposes and implements a sampling-clockless quasi-digital frequency-key-shifting (FSK) demodulator with a strong tolerance against carrier-frequency offset. To precisely discriminate periods of the FSK signal without a high-frequency sampling clock, quasi-digital time registers are used to construct pulse-width comparators (PWC) to demodulate the FSK signal, which are robust against the process, voltage, and temperature variation. In addition, a discrete-time differentiator is proposed and integrated into the demodulator to efficiently reject the inevitable carrier frequency offset and drift of the FSK signal. The demodulator is prototyped, analyzed, implemented, and tested. The measurement results show that the demodulator can demodulate FSK signal with a data rate of 1 Mbps and a modulation index of 0.5, while only requiring a 10.7 dB signal-to-noise ratio to achieve a demodulation quality with a bit-error ratio of no more than 10-3 while tolerating a frequency offset or drift in the range of -0.56 to 0.48 MHz. © 2022, Science Press. All right reserved.
Keyword ：
Clocks Clocks Comparator circuits Comparator circuits Comparators (optical) Comparators (optical) Demodulation Demodulation Demodulators Demodulators Frequency shift keying Frequency shift keying Optical variables measurement Optical variables measurement Signal to noise ratio Signal to noise ratio
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| GB/T 7714 | Yin, Yadong , Huang, Yitao . Sampling-clockless quasi-digital FSK demodulator implemented with time-register-based pulse-width comparators and a discrete-time differentiator [J]. | Chinese Journal of Scientific Instrument , 2022 , 43 (8) : 147-153 . |
| MLA | Yin, Yadong et al. "Sampling-clockless quasi-digital FSK demodulator implemented with time-register-based pulse-width comparators and a discrete-time differentiator" . | Chinese Journal of Scientific Instrument 43 . 8 (2022) : 147-153 . |
| APA | Yin, Yadong , Huang, Yitao . Sampling-clockless quasi-digital FSK demodulator implemented with time-register-based pulse-width comparators and a discrete-time differentiator . | Chinese Journal of Scientific Instrument , 2022 , 43 (8) , 147-153 . |
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提出了一种适用于反向降压(InvBuck)型负压直流-直流(DC-DC)变换器的功率管驱动电路.该驱动电路将输入的脉宽调制(PWM)信号生成两路非重叠的正压驱动信号,然后利用负压DC-DC变换器中飞电容的电压反转产生负压驱动信号.该驱动电路中所有MOS管以及功率管的漏源电压(VDS)均不超过输入电源电压(≤VIN),因而可用标准CMOS工艺实现.采用SMIC 0.18μm标准CMOS工艺完成了电路设计和仿真验证.结果表明,在900 kHz开关频率和5 V电源电压下,当PWM信号占空比在20％～90％范围变化时,本电路联合驱动功率管产生-0.99～-4.47 V的输出电压,仿真结果与理论计算值误差不超过0.7％,在输出最大电流100 mA时转换效率均大于91％.
Keyword ：
功率管驱动 功率管驱动 反向降压型变换器 反向降压型变换器 负压 负压 非重叠 非重叠 飞电容 飞电容
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| GB/T 7714 | 苏东来 , 韦孟宇 , 高跃明 et al. 负压DC-DC变换器中新型功率管驱动电路 [J]. | 电子元件与材料 , 2022 , 41 (12) : 1351-1356 . |
| MLA | 苏东来 et al. "负压DC-DC变换器中新型功率管驱动电路" . | 电子元件与材料 41 . 12 (2022) : 1351-1356 . |
| APA | 苏东来 , 韦孟宇 , 高跃明 , 阴亚东 . 负压DC-DC变换器中新型功率管驱动电路 . | 电子元件与材料 , 2022 , 41 (12) , 1351-1356 . |
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