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学者姓名：吴林煌
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Abstract ：
JPEG-XS视频编解码标准具有高质量、低复杂度、低延时等特点.针对JPEG-XS图像编解码压缩标准,对其解码算法进行了简要介绍,提出了一种面向硬件实现的高性能JPEG-XS解码器架构.所设计的解码器硬件架构采用流水线处理,能够在保持高数据吞吐量的同时减少由组合逻辑带来的路径延迟,提高了工作频率,每个时钟周期可解码4个重构像素值.实验结果表明,在Xilinx Zynq FPGA的实验平台上,所设计的高性能JPEG-XS解码器硬件架构仅占用约15×103个查找表和11×103个寄存器资源,最高主频达254 MHz,最高可支持4K、100帧/s的实时视频解码.
Keyword ：
FPGA FPGA JPEG-XS JPEG-XS 硬件架构 硬件架构 视觉无损 视觉无损 解码器 解码器
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| GB/T 7714 | 郑畅 , 吴林煌 , 李雅欣 et al. 基于FPGA的JPEG-XS高性能解码器硬件架构设计 [J]. | 电子与封装 , 2025 , 25 (2) : 49-54 . |
| MLA | 郑畅 et al. "基于FPGA的JPEG-XS高性能解码器硬件架构设计" . | 电子与封装 25 . 2 (2025) : 49-54 . |
| APA | 郑畅 , 吴林煌 , 李雅欣 , 刘伟 . 基于FPGA的JPEG-XS高性能解码器硬件架构设计 . | 电子与封装 , 2025 , 25 (2) , 49-54 . |
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为将JPEG-XS这一主流的浅压缩算法与现场可编程门阵列(FPGA)相结合,设计了一种适用于高分辨率、高帧率应用场景的视频编码器,提出了一种完整的JPEG-XS编码器硬件方案.对整个编码器进行流水线编码设计,实现模块间时间上的复用,对于模块内部,提出了4行并行计算的5/3小波变换架构,对于耗时最长的熵编码模块提出了并行编码各子包的硬件方案.实验结果表明,在Xilinx UltraScale+ZCU102的FPGA平台,该硬件架构仅占用38.9×103个查找表资源和23.8×103个寄存器资源,最大主频可达182.24 MHz,可支持4K@60帧/s的实时编码.
Keyword ：
JPEG-XS JPEG-XS 并行度 并行度 现场可编程门阵列 现场可编程门阵列 硬件架构 硬件架构
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| GB/T 7714 | 李雅欣 , 吴林煌 , 刘伟 et al. 一种JPEG-XS编码器的硬件架构优化设计 [J]. | 电子与封装 , 2025 , 25 (2) : 55-61 . |
| MLA | 李雅欣 et al. "一种JPEG-XS编码器的硬件架构优化设计" . | 电子与封装 25 . 2 (2025) : 55-61 . |
| APA | 李雅欣 , 吴林煌 , 刘伟 , 郑畅 . 一种JPEG-XS编码器的硬件架构优化设计 . | 电子与封装 , 2025 , 25 (2) , 55-61 . |
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Abstract ：
针对当前基于深度学习的行人检测算法检测精度低、模型复杂、对设备要求较高的问题,提出一种基于YOLOv8 的轻量级行人检测模型YOLOv8-PGL.首先,将卷积神经网络(Convolutional Neural Networks,CNN)和Transformer的思想结合,设计出C2f_PTB模块,增强特征提取能力,降低计算量和参数量;其次,引入改进的BiFPN网络替换原模型中的特征提取网络,提高对不同尺度特征的融合效率;再次,采用一种轻量级非对称检测头LADH,以微小性能损失大幅度减少模型的计算量和参数量;最后,使用PIoU(Powerful-IoU)替换CIoU(Complete-IoU)作为损失函数,以更准确地优化模型的预测结果,进一步提高模型的检测精度.实验结果表明,所提出的模型在多个指标上有明显的提升.相较于基准模型,YOLOv8-PGL的mAP50%提升1.9个百分点,参数量降低50%,计算量降低33%,模型大小降低48%.
Keyword ：
YOLOv8 YOLOv8 深度学习 深度学习 行人检测 行人检测 轻量化 轻量化
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| GB/T 7714 | 苏喆 , 徐成也 , 吴林煌 . 轻量级行人检测算法研究 [J]. | 电视技术 , 2025 , 49 (2) : 30-36 . |
| MLA | 苏喆 et al. "轻量级行人检测算法研究" . | 电视技术 49 . 2 (2025) : 30-36 . |
| APA | 苏喆 , 徐成也 , 吴林煌 . 轻量级行人检测算法研究 . | 电视技术 , 2025 , 49 (2) , 30-36 . |
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Abstract ：
In this paper, we propose a joint differential pulse position modulation and differential chaos shift key modulation (DPPM-DCSK), where one bit modulates the reference PPM signal by chaotic signal, and the other $m_{c}$ bits are mapped by the position index of this chaotic pulse in the information signal. In particular, in the DPPM-DCSK, the information-carrying PPM signal for the current symbol also serves as the reference for the next symbol. It can avoid the energy and rate wastes in the conventional PPM-DCSK. Moreover, we redesign the differential Walsh codes (WC) for DPPM-DCSK to enable multi-user communications. The numerical bit-error-rate (BER) performance of the proposed DPPM-DCSK-WC over multipath Rayleigh fading channels are derived and then verified by simulations. The results demonstrate that the DPPM-DCSK-WC can achieve performance gains of more than 2 dB over the conventional PPM-DCSK and DDCSK-WC for multi-user scenarios, and this gain can be up to 5 dB in the high-delay channels at a BER of ${{10}^{-4}}$. In addition, the superior performance of the proposed scheme is proved over ultra-wideband (UWB) wireless channels, which indicates its great potential for chaotic-based wireless applications. IEEE
Keyword ：
Chaotic communication Chaotic communication Codes Codes differential chaos shift keying (DCSK) differential chaos shift keying (DCSK) Indexes Indexes Modulation Modulation multi-access multi-access pulse position modulation(PPM) pulse position modulation(PPM) Symbols Symbols Transmitters Transmitters Walsh code (WC) Walsh code (WC) Wireless communication Wireless communication
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| GB/T 7714 | Wu, L. , Yin, X. , Chen, H. et al. Differential Pulse-Position Modulation for Multi-User Chaotic Communication [J]. | IEEE Transactions on Vehicular Technology , 2024 , 73 (8) : 1-15 . |
| MLA | Wu, L. et al. "Differential Pulse-Position Modulation for Multi-User Chaotic Communication" . | IEEE Transactions on Vehicular Technology 73 . 8 (2024) : 1-15 . |
| APA | Wu, L. , Yin, X. , Chen, H. , Chen, P. , Fang, Y. . Differential Pulse-Position Modulation for Multi-User Chaotic Communication . | IEEE Transactions on Vehicular Technology , 2024 , 73 (8) , 1-15 . |
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Abstract ：
In this paper, we valign="-60pt propose a joint differential pulse position modulation and differential chaos shift key modulation (DPPM-DCSK), where one bit modulates the reference PPM signal by chaotic signal, and the other m(c) bits are mapped by the position index of this chaotic pulse in the information signal. In particular, in the DPPM-DCSK, the information-carrying PPM signal for the current symbol also serves as the reference for the next symbol. It can avoid the energy and rate wastes in the conventional PPM-DCSK. Moreover, we redesign the differential Walsh codes (WC) for DPPM-DCSK to enable multi-user communications. The numerical bit-error-rate (BER) performance of the proposed DPPM-DCSK-WC over multipath Rayleigh fading channels are derived and then verified by simulations. The results demonstrate that the DPPM-DCSK-WC can achieve performance gains of more than 2 dB over the conventional PPM-DCSK and DDCSK-WC for multi-user scenarios, and this gain can be up to 5 dB in the high-delay channels at a BER of 10(-4). In addition, the superior performance of the proposed scheme is proved over ultra-wideband (UWB) wireless channels, which indicates its great potential for chaotic-based wireless applications.
Keyword ：
Chaotic communication Chaotic communication differential chaos shift keying (DCSK) differential chaos shift keying (DCSK) multi-access multi-access pulse position modulation(PPM) pulse position modulation(PPM) walsh code (WC) walsh code (WC)
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| GB/T 7714 | Wu, Linhuang , Yin, Xiangxiang , Chen, Haoyu et al. Differential Pulse-Position Modulation for Multi-User Chaotic Communication [J]. | IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY , 2024 , 73 (8) : 11303-11317 . |
| MLA | Wu, Linhuang et al. "Differential Pulse-Position Modulation for Multi-User Chaotic Communication" . | IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY 73 . 8 (2024) : 11303-11317 . |
| APA | Wu, Linhuang , Yin, Xiangxiang , Chen, Haoyu , Chen, Pingping , Fang, Yi . Differential Pulse-Position Modulation for Multi-User Chaotic Communication . | IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY , 2024 , 73 (8) , 11303-11317 . |
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Detection-based tracking is a prominent multi-object tracking (MOT) paradigm that utilizes powerful detectors for high tracking performance. However, this method primarily relies on object prediction, leading to error accumulation when objects are occluded or lost. To address this issue, we propose a novel spatial clustering-guided MOT method (SCGTrack). First, we introduce a fast spatial clustering (FSC) algorithm to efficiently group the detections by their spatial information to form clusters. Second, we develop a spatial clustering matching module to reconnect lost trajectories and re-match trajectories within the clusters. By doing so, SCGTrack can continuously track the lost objects as long as the cluster exists, which effectively mitigates long-term occlusion problems. Extensive experiment results on the MOT17 and DanceTrack dataset demonstrate that our approach achieves state-of-the-art performance in terms of tracking accuracy, with an exceptional matching speed of over 800 FPS on a single CPU. Code is available at https://github.com/Yamahhh/SCGTrack.
Keyword ：
Multi-object tracking (MOT) Multi-object tracking (MOT) Power capacitors Power capacitors Prediction algorithms Prediction algorithms Radar tracking Radar tracking real-time tracking real-time tracking Sensors Sensors Task analysis Task analysis Tracking Tracking tracklet association tracklet association Trajectory Trajectory unsupervised clustering unsupervised clustering
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| GB/T 7714 | Chen, Yulin , Li, Zongtan , Wu, Linhuang et al. An Efficient Multi-Object Tracking Guided by Spatial Clustering on Vision Sensors [J]. | IEEE SENSORS JOURNAL , 2024 , 24 (12) : 19344-19351 . |
| MLA | Chen, Yulin et al. "An Efficient Multi-Object Tracking Guided by Spatial Clustering on Vision Sensors" . | IEEE SENSORS JOURNAL 24 . 12 (2024) : 19344-19351 . |
| APA | Chen, Yulin , Li, Zongtan , Wu, Linhuang , Chen, Pingping . An Efficient Multi-Object Tracking Guided by Spatial Clustering on Vision Sensors . | IEEE SENSORS JOURNAL , 2024 , 24 (12) , 19344-19351 . |
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为了面向低延时的浅压缩场景提供更加适配的编码方案，并降低硬件实现成本，提出一种基于数字音视频编解码技术标准（Audio Video coding Standard,AVS）浅压缩算法的帧内预测模式优化以及快速率失真优化算法。该算法通过减少原有算法帧内预测所需的预测循环次数，以及打破各块之间的数据依赖关系等措施，克服了原始方案不适合硬件流水并行处理的限制，提高了编码的效率和稳定性，从而既保障了算法的视频质量，又使新的硬件实现方案更符合实际应用需求。实验结果表明，该算法优化方案能够有效改善实际面向低延时浅压缩场景下的编码效果。
Keyword ：
帧内预测 帧内预测 快速算法 快速算法 数字音视频编解码技术标准(AVS) 数字音视频编解码技术标准(AVS) 浅压缩 浅压缩
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| GB/T 7714 | 蔡江震 , 吴林煌 , 黄贺焜 . 面向硬件的AVS帧内预测算法改进 [J]. | 电视技术 , 2024 , 48 (05) : 41-47 . |
| MLA | 蔡江震 et al. "面向硬件的AVS帧内预测算法改进" . | 电视技术 48 . 05 (2024) : 41-47 . |
| APA | 蔡江震 , 吴林煌 , 黄贺焜 . 面向硬件的AVS帧内预测算法改进 . | 电视技术 , 2024 , 48 (05) , 41-47 . |
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针对现有车牌检测算法存在的模型参数量过大、实时性差和检测效果不佳等问题，提出一种基于深度学习的轻量化车牌检测网络（Lightweight License Plate Detection Networks,LW-LPDNet）模型。该模型以PP-LCNet作为骨干网络，大幅减少模型参数量，同时融入压缩-激励网络（Squeeze and Excitation Networks,SE-Net）注意力模块，增加车牌信息的通道权重。最后，引入SimSPPF和GSConv，对多尺度特征进行融合，增大感受野，进一步提高检测准确率。通过对模型进行训练和测试，LW-LPDNet在中国城市停车数据集（Chinese City Parking Dataset,CCPD）上获得98.9%的平均精确率，优于其他车牌检测方法，且模型参数量仅有0.13 MB，检测速度达到243 f·s~(-1)，具备较高的实时性。
Keyword ：
注意力 注意力 深度学习 深度学习 车牌检测 车牌检测 轻量化 轻量化
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| GB/T 7714 | 杜铭辉 , 吴林煌 , 苏喆 . 基于深度学习的轻量化车牌检测算法研究 [J]. | 电视技术 , 2024 , 48 (03) : 50-54,64 . |
| MLA | 杜铭辉 et al. "基于深度学习的轻量化车牌检测算法研究" . | 电视技术 48 . 03 (2024) : 50-54,64 . |
| APA | 杜铭辉 , 吴林煌 , 苏喆 . 基于深度学习的轻量化车牌检测算法研究 . | 电视技术 , 2024 , 48 (03) , 50-54,64 . |
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近年来，随着人们对视频数据需求的不断增加，视频的分辨率和帧率也在不断地提高，而实时视频序列的压缩编码速度往往受到帧率和分辨率的影响，分辨率和帧率越大，编码所需要的时间越长。为了实现更高分辨率和更高帧率的视频序列实时压缩编码，文中设计了一种新的帧内率失真优化预测模式的并行流水线硬件架构，该架构支持最大64×64编码树单元的帧内预测编码。首先设计了9路预测模式并行方案；然后，按照Z型扫描顺序实现以4×4块为基本处理单元的流水线硬件架构，并复用32×32预测单元的预测数据，用以代替64×64预测单元的预测数据，减少运算量；最后，基于该流水线架构，提出了一种新的哈达玛变换电路，用以实现高效的流水线处理。实验结果表明：在Altera Arria 10系列的现场可编程门阵列上，该9路模式并行架构仅占用75 kb的查找表和55 kb的寄存器资源，主频可以达到207 MHz，完成一个64×64编码树单元的预测仅需要4 096个时钟周期，最大能够支持1 080 P分辨率99 f/s全I帧的实时编码；与已有设计方案相比，文中方案能够用更小的电路面积实现更高帧率的1 080 P实时视频编码。
Keyword ：
帧内预测 帧内预测 模式并行 模式并行 现场可编程门阵列 现场可编程门阵列 高效视频编码 高效视频编码
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| GB/T 7714 | 林志坚 , 丁永强 , 杨秀芝 et al. HEVC帧内率失真优化预测模式的并行流水线硬件设计 [J]. | 华南理工大学学报(自然科学版) , 2023 , 51 (05) : 95-103 . |
| MLA | 林志坚 et al. "HEVC帧内率失真优化预测模式的并行流水线硬件设计" . | 华南理工大学学报(自然科学版) 51 . 05 (2023) : 95-103 . |
| APA | 林志坚 , 丁永强 , 杨秀芝 , 吴林煌 . HEVC帧内率失真优化预测模式的并行流水线硬件设计 . | 华南理工大学学报(自然科学版) , 2023 , 51 (05) , 95-103 . |
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In recent years, the resolution and frame rate of video have been continuously improved to meet people’s increasing demand for video data. However, the compression encoding speed of real-time video sequence is often restricted by frame rate and resolution. The higher the frame rate and resolution are, the longer the encoding time will be. In order to achieve real-time compression encode for video sequences with higher resolution and frame rate, this paper designed a new parallel pipeline hardware architecture of intra rate-distortion optimization prediction mode, which supports intra prediction coding of up to 64×64 coding tree unit. Firstly, a parallel scheme with 9-way prediction mode was designed. Secondly, a pipeline hardware architecture was implemented based on a 4×4 block as the basic processing unit in a Z-shaped scanning order, and the prediction data of 32×32 prediction units were reused to replace the prediction data of 64×64 prediction units so as to reduce the amount of calculation. Lastly, a new Hadamard transform circuit was proposed based on this pipelined architecture for efficient pipelined processing. The experimental results show that: on the Altera Arria 10 series field programmable gate array, the 9-way mode parallel architecture only occupies 75 kb look up table and 55 kb register resources, the main frequency can reach 207 MHz, and it only takes 4 096 clocks cycles to complete a 64×64 coding tree unit prediction and can support real-time encoding of 1 080 P resolution 99 f/s full I-frame at most. Compared with the existing design scheme, the scheme designed in this paper can realize higher frame rate 1080P real time video encoding with smaller circuit area. © 2023 South China University of Technology. All rights reserved.
Keyword ：
field programmable gate array field programmable gate array high efficiency video coding high efficiency video coding intra prediction intra prediction mode in parallel mode in parallel
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| GB/T 7714 | Lin, Z. , Ding, Y. , Yang, X. et al. Parallel Pipeline Hardware Design of Intra Rate-Distortion Optimization Prediction Mode in HEVC; [HEVC 帧内率失真优化预测模式的并行流水线硬件设计] [J]. | Journal of South China University of Technology (Natural Science) , 2023 , 51 (5) : 95-103 . |
| MLA | Lin, Z. et al. "Parallel Pipeline Hardware Design of Intra Rate-Distortion Optimization Prediction Mode in HEVC; [HEVC 帧内率失真优化预测模式的并行流水线硬件设计]" . | Journal of South China University of Technology (Natural Science) 51 . 5 (2023) : 95-103 . |
| APA | Lin, Z. , Ding, Y. , Yang, X. , Wu, L. . Parallel Pipeline Hardware Design of Intra Rate-Distortion Optimization Prediction Mode in HEVC; [HEVC 帧内率失真优化预测模式的并行流水线硬件设计] . | Journal of South China University of Technology (Natural Science) , 2023 , 51 (5) , 95-103 . |
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