Routing　is　the　most　time-consuming　phase　in　the　physical　design　of　modern　integrated　circuits.　A　carefully　designed　global　routing　needs　to　maximize　the　routability　for　the　detailed　routing　while　minimizing　the　wire　length　and　the　number　of　vias.　In　this　paper,　we　propose　a　gradient　ascent　algorithm　to　solve　the　3D　global　routing　ILP　model.　This　algorithm　uses　the　Lagrangian-based　cost　update　method　that　can　more　accurately　reflect　congestion　for　guiding　the　global　router　to　generate　a　solution　with　fewer　vias　and　congestion.　In　the　gradient　ascent　rip-up　and　reroute　stage,　we　use　a　DAG-based　multi-pattern　routing　strategy　to　handle　highly　congested　nets　with　constructed　multiple　routing　patterns.　Furthermore,　we　propose　a　congestion-aware　dynamic　net　ordering　algorithm　to　improve　the　congestion　convergence　of　the　rip-up　and　rerouting　stage.　Experimental　results　on　ICCAD＇19　contest　benchmarks　show　that,　on　average　our　global　router　obtains　high-quality　results,　reducing　the　number　of　vias　by　over　1%　and　370.6%　reduction　in　DRVs　compared　to　CUGR　2.0,　and　outperforms　TritonRoute-WXL＇s　global　routing　in　terms　of　runtime　consumption　and　the　number　of　vias.