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Obstacle-Avoidance X-Architecture Steiner Minimal Tree Algorithm Based on Deep Reinforcement Learning

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author:

You, Jie (You, Jie.) [1] | Zhu, Yuhan (Zhu, Yuhan.) [2] | Huang, Xing (Huang, Xing.) [3] | Unfold

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Abstract:

In recent years, we have witnessed the rapid development of the Internet of Things (IoT) paradigm. A new computing paradigm, predictive intelligence, has been introduced into many IoT applications. In IoT applications, predictive intelligent devices must consider power and delay consumption. The goal of Very Large Scale Integration (VLSI) circuit routing problem is to minimize the wirelength to optimize chip delay. Therefore, VLSI routing problems have been widely applied in IoT. The X-architecture routing technology presents a promising solution that can reduce the number of vias, wirelength, and mold size significantly, thereby proving to be a highly practical approach. Moreover, with the shift of modern VLSI design towards system-on-chip paradigm, many uncrossable obstacles appear on the plane, thus Obstacle-Avoiding X-architecture Steiner Minimal Tree (OAXSMT) problem has attracted more and more attention. Most existing algorithms are troubled by poor wirelength quality or high construction time cost. Therefore, this paper proposes a method based on Deep Reinforcement Learning to construct an OAXSMT. First, an encoder based on heterogeneous graph transformer is designed to generate fixed-length encodings for each node. Second, an actor-critic decoder based on pointer network is designed to generate obstacle-avoiding X-architecture Steiner redundant tree. Finally, a fast evaluation strategy is designed to evaluate the quality of the redundant tree. Experimental results show that the routing results generated by the algorithm are superior to existing heuristic algorithms in terms of wirelength and runtime, and the algorithm also has certain generalization ability. © 2023 IEEE.

Keyword:

Computer aided design Deep learning Heuristic algorithms Integrated circuit design Internet of things Network architecture Quality control Reinforcement learning Routing algorithms Trees (mathematics) VLSI circuits

Community:

  • [ 1 ] [You, Jie]Fuzhou University, College of Computer and Data Science, Fuzhou, China
  • [ 2 ] [Zhu, Yuhan]Fuzhou University, College of Computer and Data Science, Fuzhou, China
  • [ 3 ] [Huang, Xing]Northwestern Polytechnical University, School of Computer Science, Xi'an, China
  • [ 4 ] [Yang, Liliang]Fuzhou University, College of Computer and Data Science, Fuzhou, China
  • [ 5 ] [Liu, Genggeng]Fuzhou University, College of Computer and Data Science, Fuzhou, China

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Year: 2023

Page: 165-172

Language: English

Cited Count:

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SCOPUS Cited Count: 1

30 Days PV: 6

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管理员  2025-04-26 06:03:03  更新被引

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