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author:

Jiang, B.-X. (Jiang, B.-X..) [1] | Chen, H. (Chen, H..) [2] | Zhang, W.-J. (Zhang, W.-J..) [3] | Lan, J.-H. (Lan, J.-H..) [4] | Yang, T.-X. (Yang, T.-X..) [5] | Lin, C. (Lin, C..) [6] | Huang, Z.-H. (Huang, Z.-H..) [7] | Zhang, K.-X. (Zhang, K.-X..) [8] | Zhu, X.-Q. (Zhu, X.-Q..) [9] | He, J. (He, J..) [10] | Yang, Y.-F. (Yang, Y.-F..) [11] | Zhang, Y.-A. (Zhang, Y.-A..) [12] | Yan, Q. (Yan, Q..) [13] | Sun, J. (Sun, J..) [14]

Indexed by:

Scopus

Abstract:

Indium (In) is currently used to fabricate metal bumps on micro-light-emitting diode (Micro-LED) chips due to its excellent physical properties. However, as Micro-LED pixel size and pitch decrease, achieving high-quality In bumps on densely packed Micro-LED chips often presents more challenges. This paper describes the process of fabricating In bumps on micro-LEDs using thermal evaporation, highlighting an issue where In tends to grow laterally within the photoresist pattern, ultimately blocking the pattern and resulting in undersized and poorly dense In bumps on the Micro-LED chip. To address this issue, we conducted numerous experiments to study the height variation of In bumps within a range of photoresist aperture sizes (3 μm −7 μm) under two different resist thickness conditions (3.8 μm and 4.8 μm). The results showed that the resist thickness had a certain effect on the height of In bumps on the Micro-LED chip electrodes. Moreover, we found that, with the photoresist pattern size increasing under constant resist thickness conditions, the height and quality of the bumps significantly improved. Based on this finding, we rationalized the adjustment of the photoresist pattern size within a limited emission platform range to compensate for the height difference of In bumps caused by different resist thicknesses between the cathode and anode regions. Consequently, well-shaped and dense In bumps with a maximum height of up to 4.4 μm were fabricated on 8 μm pitch Micro-LED chips. Afterwards, we bonded the Micro-LED chip with indium bumps to the CMOS chip, and we found that we could successfully control the CMOS chip to drive the Micro-LED chip to display specific characters through the Flexible Printed Circuit (FPC). This work is of significant importance for the fabrication of In bumps on Micro-LED chips with pitches below 10 μm and subsequent bonding processes. © 2024 IOP Publishing Ltd

Keyword:

bonding height-to-size ratio Micro-LED the growth process of In bump

Community:

  • [ 1 ] [Jiang B.-X.]National and Local United Engineering Laboratory of Flat Panel Display Technology, College of Physics and Information Engineering, Fuzhou University, Fuzhou, 350100, China
  • [ 2 ] [Chen H.]National and Local United Engineering Laboratory of Flat Panel Display Technology, College of Physics and Information Engineering, Fuzhou University, Fuzhou, 350100, China
  • [ 3 ] [Zhang W.-J.]National and Local United Engineering Laboratory of Flat Panel Display Technology, College of Physics and Information Engineering, Fuzhou University, Fuzhou, 350100, China
  • [ 4 ] [Lan J.-H.]National and Local United Engineering Laboratory of Flat Panel Display Technology, College of Physics and Information Engineering, Fuzhou University, Fuzhou, 350100, China
  • [ 5 ] [Yang T.-X.]Fujian Science & Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou, 350100, China
  • [ 6 ] [Lin C.]National and Local United Engineering Laboratory of Flat Panel Display Technology, College of Physics and Information Engineering, Fuzhou University, Fuzhou, 350100, China
  • [ 7 ] [Lin C.]Fujian Science & Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou, 350100, China
  • [ 8 ] [Huang Z.-H.]Fujian Science & Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou, 350100, China
  • [ 9 ] [Zhang K.-X.]National and Local United Engineering Laboratory of Flat Panel Display Technology, College of Physics and Information Engineering, Fuzhou University, Fuzhou, 350100, China
  • [ 10 ] [Zhu X.-Q.]National and Local United Engineering Laboratory of Flat Panel Display Technology, College of Physics and Information Engineering, Fuzhou University, Fuzhou, 350100, China
  • [ 11 ] [He J.]National and Local United Engineering Laboratory of Flat Panel Display Technology, College of Physics and Information Engineering, Fuzhou University, Fuzhou, 350100, China
  • [ 12 ] [Yang Y.-F.]National and Local United Engineering Laboratory of Flat Panel Display Technology, College of Physics and Information Engineering, Fuzhou University, Fuzhou, 350100, China
  • [ 13 ] [Zhang Y.-A.]National and Local United Engineering Laboratory of Flat Panel Display Technology, College of Physics and Information Engineering, Fuzhou University, Fuzhou, 350100, China
  • [ 14 ] [Zhang Y.-A.]Fujian Science & Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou, 350100, China
  • [ 15 ] [Yan Q.]National and Local United Engineering Laboratory of Flat Panel Display Technology, College of Physics and Information Engineering, Fuzhou University, Fuzhou, 350100, China
  • [ 16 ] [Yan Q.]Fujian Science & Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou, 350100, China
  • [ 17 ] [Sun J.]National and Local United Engineering Laboratory of Flat Panel Display Technology, College of Physics and Information Engineering, Fuzhou University, Fuzhou, 350100, China
  • [ 18 ] [Sun J.]Fujian Science & Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou, 350100, China
  • [ 19 ] [Sun J.]Quantum Device Physics Laboratory, Department of Microtechnology and Nanoscience, Chalmers University of Technology, Gothenburg, 41296, Sweden

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Source :

Engineering Research Express

ISSN: 2631-8695

Year: 2024

Issue: 2

Volume: 6

1 . 5 0 0

JCR@2023

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count: 3

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 0

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