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author:

Huang, Xing (Huang, Xing.) [1] | Cai, Huayang (Cai, Huayang.) [2] | Guo, Wenzhong (Guo, Wenzhong.) [3] | Liu, Genggeng (Liu, Genggeng.) [4] | Ho, Tsung-Yi (Ho, Tsung-Yi.) [5] | Chakrabarty, Krishnendu (Chakrabarty, Krishnendu.) [6] | Schlichtmann, Ulf (Schlichtmann, Ulf.) [7]

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EI

Abstract:

Fully programmable valve array (FPVA) biochips have emerged as a promising alternative for traditional application-specific microfluidic platforms thanks to their advantages in terms of flexibility and reconfigurability. By regularly deploying microvalves along vertical and horizontal flow channels, microfluidic modules with different sizes and shapes can be constructed dynamically on the chip, thereby enabling the automatic execution of various assay procedures in biology and biochemistry. The above advantages, however, result largely from the large-scale integration of valves as well as accurate control of their switchings, leading to very complicated control-logic design of such chips. In this article, we propose an reinforcement learning (RL)-based synthesis flow for the control-logic design of fully programmable valve array (FPVA) biochips, taking multichannel switching and control-cost minimization into consideration simultaneously. By employing a double deep Q-network (DDQN) and two Boolean-logic simplification techniques, control logics with both high-switching efficiency and low-fabrication cost can be constructed automatically. Furthermore, the solution space of multichannel-switching combinations is reduced to improve the search efficiency of the proposed method. Experimental results on multiple benchmarks demonstrate that the proposed synthesis flow leads to better-design solutions compared with the state-of-the-art techniques. © 1982-2012 IEEE.

Keyword:

Biochips Computer circuits Efficiency Logic Synthesis Microfluidics Reinforcement learning Valves (mechanical)

Community:

  • [ 1 ] [Huang, Xing]Northwestern Polytechnical University, School of Computer Science, Xi'an; 710060, China
  • [ 2 ] [Cai, Huayang]Fuzhou University, College of Computer and Data Science, Fuzhou; 350116, China
  • [ 3 ] [Guo, Wenzhong]Fuzhou University, College of Computer and Data Science, Fuzhou; 350116, China
  • [ 4 ] [Liu, Genggeng]Fuzhou University, College of Computer and Data Science, Fuzhou; 350116, China
  • [ 5 ] [Ho, Tsung-Yi]The Chinese University of Hong Kong, Department of Computer Science and Engineering, Hong Kong, Hong Kong
  • [ 6 ] [Chakrabarty, Krishnendu]Arizona State University, School of Electrical, Computer and Energy Engineering, Tempe; AZ; 85281, United States
  • [ 7 ] [Schlichtmann, Ulf]Technical University of Munich, Electronic Design Automation, Munich; 80333, Germany

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Source :

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

ISSN: 0278-0070

Year: 2024

Issue: 1

Volume: 43

Page: 277-290

2 . 7 0 0

JCR@2023

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count: 4

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 0

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