With　the　rapid　increase　in　circuit　density　in　Very　Large　Scale　Integration,　the　proportion　of　interconnect　delay　in　circuit　timing　is　also　increasing.　This　makes　the　importance　of　layer　assignment　algorithms　increasingly　prominent　in　circuit　design.　However,　most　previous　layer　assignment　algorithms　prioritize　optimizing　timing　exclusively　from　the　perspective　of　interconnect　delay,　thereby　disregarding　the　impact　of　slew　violations　on　circuits.　Therefore,　this　paper　proposes　a　slew-driven　layer　assignment　algorithm,　which　considers　the　timing　of　different　routing　layers　and　introduces　non-default-rule　wires　to　design　a　layer　assignment　algorithm　that　can　significantly　optimize　delay,　congestion,　and　slew　violations.　This　algorithm　mainly　includes　three　key　technologies:　1)　Introducing　non-default-rule　wires　technology　to　optimize　timing　and　adopting　a　negotiation　based　approach　to　ensure　that　the　final　routing　scheme　does　not　have　overflow;　2)　Proposing　a　slew　prioritization　strategy　that　comprehensively　considers　slew　and　interconnect　delay　during　the　routing　process;　3)　Proposing　a　timing　critical　awareness　strategy　to　further　optimize　the　slew　and　interconnect　delay　without　worsening　the　overflow.　The　experimental　results　show　that　the　proposed　algorithm　has　significant　effects　on　optimizing　delay　and　reducing　slew　violations.　©　2023,　The　Author(s),　under　exclusive　license　to　Springer　Nature　Singapore　Pte　Ltd.