Reference　placement　is　promising　to　handle　the　increasing　complexity　in　PCB　design.　We　model　the　netlist　into　a　graph　and　use　a　subgraph　matching　algorithm　to　find　the　isomorphism　of　the　placed　template　in　component　combination　to　reuse　the　placement.　The　state-of-the-art　VF3　algorithm　can　achieve　high　matching　accuracy　while　suffering　from　high　computation　time　in　large-scale　instances.　Thus,　we　propose　the　D2BS　algorithm　to　guarantee　matching　quality　and　efficiency.　We　build　and　filter　the　candidate　set　(CS)　according　to　designed　features　to　construct　the　CS　structure.　In　the　CS　optimization,　a　graph　diversity　tolerance　strategy　is　adopted　to　achieve　inexact　matching.　Then,　hierarchical　match　is　developed　to　search　the　template　embeddings　in　the　CS　structure　guided　by　branch　backtracking　and　matched　nodes　snatching.　Experimental　results　show　that　D2BS　outperforms　VF3　in　accuracy　and　runtime,　achieving　100%　accuracy　on　PCB　instances.　©　2022　ACM.