Thanks　to　its　superior　feature　of　non-volatility,　fast　read/write　speed,　high　endurance,　and　low　power　consumption,　spin-torque　transfer　magnetic　random　access　memory(STT-MRAM)　has　become　a　promising　non-volatile　memory　(NVMs)　technology　that　is　suitable　for　many　application.　An　STT-MRAM　cell　consists　of　magnetic　tunneling　junction(MTJ)　as　the　data　storage　element　and　an　nMOS　transistor　as　the　access　control　device.　But,　due　to　the　physical　characteristics　of　MTJ,　the　smallest　storage　unit　of　STT-MRAM,　the　write　error　transition　probabilities　differ　by　several　orders　of　magnitude.　Due　to　the　asymmetric　channel　of　write　errors,　the　maximum　error　transition　probability　is　of　the　order　of　10-4.　Therefore,　to　flip　these　small　data　bits　correctly,　dynamic　slient-variable-node-free　scheduling　(D-SVNFS)　is　used　to　correct　these　variable　nodes　quickly.　However,　due　to　the　greedy　nature　of　D-SVNFS,　D-SVNFS　may　flip　the　corrected　data　bits　again.　To　solve　the　increase　of　decoding　error　rate　caused　by　the　greedy　nature　of　D-SVNFS,　D-SVNFS　and　RBI-MSD　(reliablity-based　iterative　min-sum　decoding)　decoding　algorithms　are　combined　by　a　joint　method.　After　D-SVNFS　corrects　the　error　data　bits,　switch　to　RBI-MSD　to　further　correct　and　verify　the　codes.　Simulation　results　show　that　joint　decoding　has　better　error　correction　ability　than　RBI-MSD　for　LDPC　code　error　caused　by　unexpected　bit　reversal　in　the　STT-MRAM　channel.　©　2021　IEEE.