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author:

Qian, Hui (Qian, Hui.) [1] | Song, Xinxin (Song, Xinxin.) [2] | Li, Dengji (Li, Dengji.) [3] | Wang, Zhongfeng (Wang, Zhongfeng.) [4]

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Abstract:

Conventional analog-to-information converter (AIC) frameworks employ a discrete-time synthesis sparse model to deal with analog signals, which, however, induces a challenging basis mismatch problem. In this paper, we propose a novel AIC framework, called generalized AIC (G-AIC), to tackle this issue. In the new method, an analysis sparse model is taken, for the first time, as the prior information of analog signals being sampled at sub-Nyquist rate. Through the joint optimization for the discretization operator and its analysis sparse operator, the G-AIC removes the model error between an analog signal and its equivalent discrete samples. To validate the G-AIC framework, we design a single channel G-AIC system based on switched-capacitor (SC) circuits. The circuit design is presented at the theoretical-level, the system-level, and the transistor-level. Numerical simulations demonstrate the G-AIC system can well restore an analog signal from its sub-Nyquist measurements, even though its sparse basis is unknown. Compared with two state-of-the-art AIC systems, the new design can achieve at least 2dB reconstruction gain. In brief, the proposed method provides a promising alternative to exploit analog signals in sub-Nyquist sampling systems. © 2021 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.

Keyword:

Electrical engineering Electronics engineering Integrated circuit manufacture

Community:

  • [ 1 ] [Qian, Hui]College of Physics and Information Engineering, Fuzhou University, Fuzhou; 350108, China
  • [ 2 ] [Song, Xinxin]College of Physics and Information Engineering, Fuzhou University, Fuzhou; 350108, China
  • [ 3 ] [Li, Dengji]College of Physics and Information Engineering, Fuzhou University, Fuzhou; 350108, China
  • [ 4 ] [Wang, Zhongfeng]School of Electronic Science and Engineering, Nanjing University, Nanjing; 210023, China

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Source :

IEEE Transactions on Circuits and Systems I: Regular Papers

ISSN: 1549-8328

Year: 2021

Issue: 9

Volume: 68

Page: 3574-3586

4 . 1 4

JCR@2021

5 . 2 0 0

JCR@2023

ESI HC Threshold:105

JCR Journal Grade:2

CAS Journal Grade:3

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count: 5

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 0

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