Capacitor　mismatches　result　from　systematic　mismatches　and　random　mismatches.　It　is　well-known　that　placement　in　common-centroid　and　symmetric　structure　can　be　used　to　efficiently　reduce　systematic　mismatch.　However,　such　structure　is　useless　for　reducing　random　mismatch.　It　is　found　that,　based　on　a　spatial　correlation　model,　higher　correlation　coefficient　(a　value　for　measuring　dispersion)　results　in　lower　random　mismatch　and　higher　chip　yield.　This　paper　proposes　an　algorithm　which　can　immediately　achieve　placements　in　common-centroid,　symmetric　structure　to　reduce　systematic　mismatches,　and　high　correlation　coefficient　to　reduce　random　mismatches.　The　experiment　results　show　that　the　proposed　algorithm　can　reduce　the　running　times　from　dozens　of　minutes　to　zeros,　and　achieve　correlation　coefficients,　in　average,　up　to　94.29%　of　the　known　best　results　which　are　derived　from　searching　almost　the　whole　solution　space.　©　2011　AICIT.