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author:

Xu, Yusen (Xu, Yusen.) [1] | Hui, Wei (Hui, Wei.) [2] | Huang, Fengying (Huang, Fengying.) [3] | Huang, Jiwei (Huang, Jiwei.) [4] (Scholars:黄继伟)

Indexed by:

CPCI-S

Abstract:

A new low-power voltage reference circuit was proposed using the SMIC 0.18um standard CMOS process technology. The resulting voltage is equal to the extrapolated threshold voltage of a MOSFET at 0K, which was about 620mV for this process. Cadence Spectre simulation results show that the temperature coefficient of the output voltage was 12.9ppm/degrees C in a range from -20 to 80 degrees C. The line sensitivity was 328ppm/V in a supply voltage range of 1.2-3V. Meanwhile -68 dB @ 100Hz of the power supply rejection ratio (PSRR) is reached and it merely consumes 0.21 mu W of power. The proposed circuit is full composed of CMOS devices without any use of resistors, which enjoys the merits of low power consumption and small chip area.

Keyword:

Community:

  • [ 1 ] [Xu, Yusen]Fuzhou Univ, Dept Phys & Informat Engn, Fuzhou 350002, Peoples R China
  • [ 2 ] [Hui, Wei]Fuzhou Univ, Dept Phys & Informat Engn, Fuzhou 350002, Peoples R China
  • [ 3 ] [Huang, Fengying]Fuzhou Univ, Dept Phys & Informat Engn, Fuzhou 350002, Peoples R China
  • [ 4 ] [Huang, Jiwei]Fuzhou Univ, Dept Phys & Informat Engn, Fuzhou 350002, Peoples R China

Reprint 's Address:

  • 许育森

    [Xu, Yusen]Fuzhou Univ, Dept Phys & Informat Engn, Fuzhou 350002, Peoples R China

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Source :

2013 IEEE 10TH INTERNATIONAL CONFERENCE ON ASIC (ASICON)

ISSN: 2162-7541

Year: 2013

Language: English

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count:

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 0

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