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author:

Chen, Xiang (Chen, Xiang.) [1] | Zhang, Dong (Zhang, Dong.) [2] (Scholars:张栋) | Zhou, Haifeng (Zhou, Haifeng.) [3]

Indexed by:

CPCI-S

Abstract:

P4 provides operators with the ability to program the packet processing pipeline of the data plane device. The match-action table (MAT) is a basic component of the P4 pipeline that matches the packet and performs an action on the matched packet. However, different MATs may execute duplicate match operations that decreases the performance of the P4 pipeline. To this end, we present MATReduce, a framework that optimizes the P4 pipeline by reducing duplicate match operations between MATs. MATReduce is composed of two key components, the preprocessor and the runtime manager. By introducing the compound MAT and rewriting the P4 control flow, the preprocessor merges duplicate match operations of the P4 pipeline while maintaining the program semantics. At runtime, the runtime manager converts user rules to actual rules for maintaining the policy consistency. Our preliminary experimental results show that MATReduce provides significant performance improvement, including a 23.90% throughput increase and a 34.37% delay decrease on the software target, and a 45.19% delay decrease on the hardware target.

Keyword:

data plane device match-action table P4

Community:

  • [ 1 ] [Chen, Xiang]Fuzhou Univ, Coll Math & Comp Sci, Fuzhou 350116, Fujian, Peoples R China
  • [ 2 ] [Zhang, Dong]Fuzhou Univ, Coll Math & Comp Sci, Fuzhou 350116, Fujian, Peoples R China
  • [ 3 ] [Zhou, Haifeng]Zhejiang Univ, Coll Comp Sci & Technol, Hangzhou 310058, Zhejiang, Peoples R China

Reprint 's Address:

  • 陈翔

    [Chen, Xiang]Fuzhou Univ, Coll Math & Comp Sci, Fuzhou 350116, Fujian, Peoples R China

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Source :

2018 IEEE GLOBAL COMMUNICATIONS CONFERENCE (GLOBECOM)

ISSN: 2334-0983

Year: 2018

Language: English

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count:

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 2

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