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author:

Yin, Tao (Yin, Tao.) [1] | Xin, Fubin (Xin, Fubin.) [2] | Li, Fanyang (Li, Fanyang.) [3] (Scholars:李凡阳) | Liu, Fei (Liu, Fei.) [4] | Yang, Haigang (Yang, Haigang.) [5]

Indexed by:

EI Scopus SCIE

Abstract:

A novel energy-efficient hybrid multi-bit Sigma-Delta modulator with a reusable successive approximation register (SAR) quantizer is proposed. By reusing the SAR quantizer, sampling capacitors in the first integrator of the modulator could be eliminated and almost rail to rail input signal range could be achieved by the modulator without the requirement of a high-swing analog adder in front of the quantizer, which is usually power hungry in multi-bit modulators. In this way, small capacitors could be used to meet the thermal noise requirements, thus reducing the power and area consumption. With an improved switching procedure, only a half number of the unit capacitors are needed in the SAR quantizer, which further reduce the area consumption.

Keyword:

ADC CMOS energy-efficient Sigma-Delta modulator successive approximation register

Community:

  • [ 1 ] [Yin, Tao]Chinese Acad Sci, Inst Elect, Beijing 100190, Peoples R China
  • [ 2 ] [Xin, Fubin]Chinese Acad Sci, Inst Elect, Beijing 100190, Peoples R China
  • [ 3 ] [Liu, Fei]Chinese Acad Sci, Inst Elect, Beijing 100190, Peoples R China
  • [ 4 ] [Li, Fanyang]Fuzhou Univ, Key Lab Microelect FJ Prov, Fuzhou, Fujian, Peoples R China
  • [ 5 ] [Yang, Haigang]Univ Chinese Acad Sci, Beijing 100190, Peoples R China

Reprint 's Address:

  • 李凡阳

    [Li, Fanyang]Fuzhou Univ, Key Lab Microelect FJ Prov, Fuzhou, Fujian, Peoples R China

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Source :

IEICE ELECTRONICS EXPRESS

ISSN: 1349-2543

Year: 2019

Issue: 3

Volume: 16

0 . 7 8 8

JCR@2019

0 . 8 0 0

JCR@2023

ESI Discipline: ENGINEERING;

ESI HC Threshold:150

CAS Journal Grade:4

Cited Count:

WoS CC Cited Count: 1

SCOPUS Cited Count: 1

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 1

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